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HD74ALVCH16270T

产品描述ALVC/VCX/A SERIES, 12-BIT EXCHANGER, TRUE OUTPUT, PDSO56, TSSOP-56
产品类别逻辑    逻辑   
文件大小105KB,共14页
制造商Renesas(瑞萨电子)
官网地址https://www.renesas.com/
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HD74ALVCH16270T概述

ALVC/VCX/A SERIES, 12-BIT EXCHANGER, TRUE OUTPUT, PDSO56, TSSOP-56

HD74ALVCH16270T规格参数

参数名称属性值
厂商名称Renesas(瑞萨电子)
零件包装代码TSSOP
包装说明TSSOP,
针数56
Reach Compliance Codeunknown
系列ALVC/VCX/A
JESD-30 代码R-PDSO-G56
长度14 mm
逻辑集成电路类型BUS EXCHANGER
位数12
功能数量1
端口数量3
端子数量56
最高工作温度85 °C
最低工作温度-40 °C
输出特性3-STATE
输出极性TRUE
封装主体材料PLASTIC/EPOXY
封装代码TSSOP
封装形状RECTANGULAR
封装形式SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
传播延迟(tpd)6.5 ns
认证状态Not Qualified
座面最大高度1.2 mm
最大供电电压 (Vsup)3.6 V
最小供电电压 (Vsup)2.3 V
标称供电电压 (Vsup)2.5 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子形式GULL WING
端子节距0.5 mm
端子位置DUAL
宽度6.1 mm

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HD74ALVCH16270
12-bit to 24-bit Registered Bus Exchanger with 3-state Outputs
ADE-205-137 (Z)
Preliminary 1st. Edition
May 1996
Description
The HD74ALVCH16270 is used in applications where data must be transferred from a narrow high speed
bus to a wide lower frequency bus. The device provides synchronous data exchange between the two ports.
Data is stored in the internal registers on the low to high transition of the clock (CLK) input when the
appropriate
CLKEN
inputs are low. The select (SEL) line selects 1B or 2B data for the A outputs. For data
transfer in the A to B direction, a two stage pipeline is provided in the A to 1B path, with a single storage
register in the A to 2B path. Proper control of the
CLKENA
inputs allows two sequential 12-bit words to
be presented synchronously as a 24-bit word on the B port. Data flow is controlled by the active low output
enables (OEA,
OEB).
The control terminals are registered to synchronize the bus direction changes with
CLK. Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
Features
V
CC
= 2.3 V to 3.6 V
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25°C)
Typical V
OH
undershoot > 2.0 V (@V
CC
= 3.3 V, Ta = 25°C)
High output current
±24
mA (@V
CC
= 3.0 V)
Bus hold on data inputs eliminates the need for external pullup / pulldown resistors

 
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