May 1998
NDS9945
Dual N-Channel Enhancement Mode Field Effect Transistor
General Description
SO-8 N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high
cell density, DMOS technology. This very high density
process is especially tailored to provide superior switching
performance and minimize on-state resistance. These
devices are particularly suited for low voltage applications
such as disk drive motor control, battery powered circuits
where fast switching, low in-line power loss, and resistance
to transients are needed.
Features
3.5 A, 60 V. R
DS(ON)
= 0.100
Ω
@ V
GS
= 10 V,
R
DS(ON)
= 0.200
Ω
@ V
GS
= 4.5 V.
High density cell design for extremely low R
DS(ON)
.
High power and current handling capability in a widely
used surface mount package.
Dual MOSFET in surface mount package.
SOT-23
SuperSOT -6
TM
SuperSOT -8
TM
SO-8
SOT-223
SOIC-16
D2
D1
D1
D2
5
6
G2
7
8
4
3
2
1
S
ND 45
99
S2
G1
SO-8
pin
1
S1
Absolute Maximum Ratings
Symbol
V
DSS
V
GSS
I
D
P
D
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current - Continuous
- Pulsed
T
A
= 25
o
C unless other wise noted
NDS9945
60
±20
(Note 1a)
Units
V
V
A
3.5
10
2
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
(Note 1c)
W
1.6
1
0.9
-55 to 150
°C
T
J
,T
STG
R
θ
JA
R
θ
JC
Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
78
40
°C/W
°C/W
NDS9945 Rev.B
© 1998 Fairchild Semiconductor Corporation
Electrical Characteristics
(
T
A
= 25
O
C unless otherwise noted )
Symbol
Parameter
Conditions
Min
Typ
Max
Units
OFF CHARACTERISTICS
BV
DSS
Drain-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Zero Gate Voltage Drain Current
Gate - Body Leakage, Forward
Gate - Body Leakage, Reverse
(Note 2)
V
GS
= 0 V, I
D
= 250 µA
I
D
= 250 µA, Referenced to 25
o
C
V
DS
= 48 V, V
GS
= 0 V
V
GS
= 20 V, V
DS
= 0 V
V
GS
= -20 V, V
DS
= 0 V
V
DS
= V
GS
, I
D
= 250 µA
T
J
=125°C
V
GS
= 10 V, I
D
= 3.5 A
T
J
=125°C
V
GS
= 4.5 V, I
D
= 2.5 A
T
J
=125°C
60
60
1
100
-100
V
mV/
o
C
µA
nA
nA
∆
BV
DSS
/
∆
T
J
I
DSS
I
GSSF
I
GSSR
V
GS(th)
R
DS(ON)
ON CHARACTERISTICS
Gate Threshold Voltage
1
0.7
1.7
3
2.2
V
Static Drain-Source On-Resistance
0.076
0.124
0.103
0.166
10
5.3
0.1
0.18
0.2
0.3
Ω
I
D(ON)
g
FS
C
iss
C
oss
C
rss
t
D(on)
t
r
t
D(off)
t
f
Q
g
Q
gs
Q
gd
I
S
V
SD
t
rr
I
rr
On-State Drain Current
Forward Transconductance
V
GS
= 10 V, V
DS
= 10 V
V
DS
= 10 V, I
D
= 3.5 A
V
DS
= 25 V, V
GS
= 0 V,
f = 1.0 MHz
A
S
DYNAMIC CH ARACTERISTICS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
(Note 2)
345
110
25
pF
pF
pF
SWITCHING CHARACTERISTICS
Turn - On Delay Time
Turn - On Rise Time
Turn - Off Delay Time
Turn - Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DS
= 30 V, I
D
= 1 A
V
GS
= 10 V , R
GEN
= 6
Ω
5
7.5
20
7
25
30
50
40
30
ns
V
DS
= 30 V, I
D
= 3.5 A,
V
GS
= 10 V
12.9
1.7
3.2
nC
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
Maximum Continuous Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Current
V
GS
= 0 V, I
S
= 1.3 A
V
GS
= 0 V, I
F
= 1.3 A,
dI
F
/dt = 100 A/µs
(Note 2)
1.3
0.8
40
1.5
1.2
A
V
ns
A
Notes:
1. R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
θ
JC
is guaranteed by
design while R
θ
CA
is determined by the user's board design.
a. 78
O
C/W on a 0.5 in
2
pad of 2oz copper.
b. 125
O
C/W on a 0.02 in
2
pad of 2oz copper.
c. 135
O
C/W on a 0.003 in
2
pad of 2oz copper.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
NDS9945 Rev.B
Typical Electrical Characteristics
20
I
D
, DRAIN-SOURCE CURRENT (A)
2.5
6.0V
5.0V
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
V
GS
= 10V
2.25
2
V
GS
= 3.0V
15
4.5V
4.0V
3.5 V
1.75
10
4.0 V
1.5
1.25
1
0.75
3.5V
5
4.5 V
5.0V
6.0V
10V
0
2
4
6
8
10
3.0V
0
0
1
V
DS
2
3
4
5
, DRAIN-SOURCE VOLTAGE (V)
I
D
, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
2
DRAIN-SOURCE ON-RESISTANCE
R
DS(ON)
, ON-RESISTANCE (OHM)
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
-50
I
D
= 3.5A
V
GS
= 10V
0.4
I
D
= 2A
0.3
R
DS(ON)
, NORMALIZED
0.2
T
A
=125°C
0.1
T
A
=25°C
0
2
V
4
GS
-25
0
25
50
75
100
T , JUNCTION TEMPERATURE (°C)
J
125
150
6
8
10
, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation With
Temperature.
Figure 4. On Resistance Variation with
Gate-to-Source Voltage.
10
V
DS
= 5V
I
D
, DRAIN CURRENT (A)
8
I
S
, REVERSE DRAIN CURRENT (A)
TJ = -55°C
25°C
125°C
10
V
GS
= 0V
5
3
2
1
0.5
0.3
0.2
0.1
0.4
TJ = 125°C
25°C
-55°C
6
4
2
0
1
1.5
2
2.5
3
3.5
4
4.5
5
0.6
0.8
1
1.2
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5 . Transfer Characteristics.
Figure 6. Body Diode Forward Voltage
Variation with Source Current
and Temperature.
NDS9945 Rev.B
Typical Electrical Characteristics (continued)
1000
10
V
GS
, GATE-SOURCE VOLTAGE (V)
I
D
= 3.5A
8
V
DS
= 10V
40V
CAPACITANCE (pF)
400
30V
Ciss
200
6
Coss
100
50
4
Crss
20
10
0.1
2
f = 1 MHz
V
GS
= 0 V
0.3
1
3
10
20
50
0
0
2
4
6
8
10
12
14
Q
g
, GATE CHARGE (nC)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
50
IT
LIM
N)
(O
S
RD
Figure 8. Capacitance Characteristics.
30
10
I
D
, DRAIN CURRENT (A)
3
1
0.3
0.1
0.03
0.01
0.1
100
us
1m
s
POWER (W)
40
10m
s
10
0m
s
SINGLE PULSE
R
θ
JA
=135°C/W
T
A
= 25°C
30
V
GS
=10V
SINGLE PULSE
R
θ
JA
= 135°C/W
A
T
A
= 25°C
0.2
0.5
1
2
5
1s
10s
DC
20
10
10
20
50
100
0
0.001
0.01
0.1
1
10
100
300
V
DS
, DRAIN-SOURCE VOLTAGE (V)
SINGLE PULSE TIME (SEC)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power
Dissipation.
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
1
0.5
0.2
0.1
0.05
0.02
0.01
0.005
0.002
0.001
0.0001
0.001
0.01
0.1
t
1
, TIME (sec)
1
10
D = 0.5
0.2
0.1
0.05
0.02
0.01
Single Pulse
P(pk)
R
θ
JA
(t) = r(t) * R
θ
JA
R
θ
JA
=
135
°C/W
t
1
t
2
T
J
- T
A
= P * R
θ
JA (t)
Duty Cycle, D = t
1
/t
2
100
300
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
NDS9945 Rev.B
SO-8 Tape and Reel Data and Package Dimensions
SOIC(8lds) Packaging
Configuration:
Figure 1.0
Packaging Description:
EL ECT ROST AT IC
SEN SIT IVE DEVICES
DO NO T SHI P OR STO RE N EAR ST RO NG EL ECT ROST AT IC
EL ECT RO M AGN ETI C, M AG NET IC O R R ADIO ACT IVE FI ELD S
TNR D ATE
PT NUMB ER
PEEL STREN GTH MIN ___ __ ____ __ ___gms
MAX ___ ___ ___ ___ _ gms
Antistatic Cover Tape
ESD Label
SOIC-8 parts are shipped in tape. The carrier tape is
made from a dissipative (carbon filled) polycarbonate
resin. The cover tape is a multilayer film (Heat Activated
Adhesive in nature) primarily composed of polyester film,
adhesive layer, sealant, and anti-static sprayed agent.
These reeled parts in standard option are shipped with
2,500 units per 13" or 330cm diameter reel. The reels are
dark blue in color and is made of polystyrene plastic (anti-
static coated). Other option comes in 500 units per 7" or
177cm diameter reel. This and some other options are
further described in the Packaging Information table.
These full reels are individually barcode labeled and
placed inside a standard intermediate box (illustrated in
figure 1.0) made of recyclable corrugated brown paper.
One box contains two reels maximum. And these boxes
are placed inside a barcode labeled shipping box which
comes in different sizes depending on the number of parts
shipped.
Static Dissipative
Embossed Carrier Tape
F63TNR
Label
Customized
Label
F852
NDS
9959
F852
NDS
9959
F852
NDS
9959
F852
NDS
9959
SOIC (8lds) Packaging Information
Packaging Option
Packaging type
Qty per Reel/Tube/Bag
Reel Size
Box Dimension (mm)
Max qty per Box
Weight per unit (gm)
Weight per Reel (kg)
Note/Comments
Standard
(no flow code)
TNR
2,500
13" Dia
343x64x343
5,000
0.0774
0.6060
L86Z
Rail/Tube
95
-
530x130x83
30,000
0.0774
-
F011
TNR
4,000
13" Dia
343x64x343
8,000
0.0774
0.9696
D84Z
TNR
500
7" Dia
184x187x47
1,000
0.0774
0.1182
F852
NDS
9959
Pin 1
SOIC-8 Unit Orientation
343mm x 342mm x 64mm
Standard Intermediate box
ESD Label
F63TNR Label sample
LOT: CBVK741B019
FSID: FDS9953A
QTY: 2500
SPEC:
F63TNLabel
F63TN Label
ESD Label
(F63TNR)3
D/C1: D9842
D/C2:
QTY1:
QTY2:
SPEC REV:
CPN:
N/F: F
SOIC(8lds) Tape Leader and Trailer
Configuration:
Figure 2.0
Carrier Tape
Cover Tape
Components
Trailer Tape
640mm minimum or
80 empty pockets
Leader Tape
1680mm minimum or
210 empty pockets
July 1999, Rev. B
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