SN74LS85
4-Bit Magnitude
Comparator
The SN74LS85 is a 4-Bit Magnitude Camparator which compares
two 4-bit words (A, B), each word having four Parallel Inputs (A0–A3,
B0–B3); A3, B3 being the most significant inputs. Operation is not
restricted to binary codes, the device will work with any monotonic
code. Three Outputs are provided: “A greater than B” (OA>B), “A less
than B” (OA<B), “A equal to B” (OA=B). Three Expander Inputs, IA>B,
IA<B, IA=B, allow cascading without external gates. For proper
compare operation, the Expander Inputs to the least significant
position must be connected as follows: IA<B= IA>B = L, IA=B = H. For
serial (ripple) expansion, the OA>B, OA<B and OA=B Outputs are
connected respectively to the IA>B, IA<B, and IA=B Inputs of the next
most significant comparator, as shown in Figure 1. Refer to
Applications section of data sheet for high speed method of comparing
large words.
The Truth Table on the following page describes the operation of the
SN74LS85 under all possible logic conditions. The upper 11 lines
describe the normal operation under all conditions that will occur in a
single device or in a series expansion scheme. The lower five lines
describe the operation under abnormal conditions on the cascading
inputs. These conditions occur when the parallel expansion technique
is used.
•
Easily Expandable
•
Binary or BCD Comparison
•
OA>B, OA<B, and OA=B Outputs Available
GUARANTEED OPERATING RANGES
Symbol
VCC
TA
IOH
IOL
Parameter
Supply Voltage
Operating Ambient
Temperature Range
Output Current – High
Output Current – Low
Min
4.75
0
Typ
5.0
25
Max
5.25
70
–0.4
8.0
Unit
V
°C
mA
mA
16
1
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LOW
POWER
SCHOTTKY
16
1
PLASTIC
N SUFFIX
CASE 648
16
1
SOIC
D SUFFIX
CASE 751B
SOEIAJ
M SUFFIX
CASE 966
ORDERING INFORMATION
Device
SN74LS85N
SN74LS85D
SN74LS85DR2
SN74LS85M
SN74LS85MEL
Package
16 Pin DIP
SOIC–16
SOIC–16
SOEIAJ–16
SOEIAJ–16
Shipping
2000 Units/Box
38 Units/Rail
2500/Tape & Reel
See Note 1
See Note 1
1. For ordering information on the EIAJ version of
the SOIC package, please contact your local
ON Semiconductor representative.
©
Semiconductor Components Industries, LLC, 2001
1
October, 2001 – Rev. 7
Publication Order Number:
SN74LS85/D
SN74LS85
CONNECTION DIAGRAM DIP
(TOP VIEW)
VCC
16
A3
15
B2
14
A2
13
A1
12
B1
11
A0
10
B0
9
NOTE:
The Flatpak version has the same
pinouts (Connection Diagram) as
the Dual In Line Package.
1
B3
2
3
4
5
6
7
8
IA<B IA=B IA>B OA>B OA=B OA<B GND
LOADING
(Note a)
PIN NAMES
A0 - A3, B0 - B3
IA = B
IA < B, IA > B
OA > B
OA < B
OA = B
Parallel Inputs
A = B Expander Inputs
A < B, A > B, Expander Inputs
A Greater than B Output
B Greater than A Output
A Equal to B Output
HIGH
1.5 U.L.
1.5 U.L.
0.5 U.L.
10 U.L.
10 U.L.
10 U.L.
LOW
0.75 U.L.
0.75 U.L.
0.25 U.L.
5 U.L.
5 U.L.
5 U.L.
NOTES:
a) 1 TTL Unit Load (U.L.) = 40
mA
HIGH/1.6 mA LOW.
LOGIC SYMBOL
10 12 13 15 9 11 14 1
4
2
3
A0 A1 A2 A3 B0 B1 B2 B3
OA>B
IA>B
OA<B
IA<B
OA=B
IA=B
VCC = PIN 16
GND = PIN 8
5
7
6
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2
SN74LS85
A n3
A n2
A n1
B n3
B n2
A0 A1 A2 A3 B0 B1 B2 B3
A0 A1 A2 A3 B0 B1 B2 B3
IA > B
OA > B
OA < B
IA < B
SN74LS85
IA = B
OA = B
B n1
An
Bn
L
L
H
A0 A1 A2 A3 B0 B1 B2 B3
OA > B
IA > B
OA < B
IA < B
SN74LS85
OA = B
IA = B
A>B
A<B
A=B
L = LOW LEVEL
H = HIGH LEVEL
Figure 1. Comparing Two n-Bit Words
APPLICATIONS
Figure 2 shows a high speed method of comparing two
24-bit words with only two levels of device delay. With the
technique shown in Figure 1, six levels of device delay result
Table 1
WORD LENGTH
1–4 Bits
5–24 Bits
25–120 Bits
NUMBER OF PKGS.
1
2–6
8–31
when comparing two 24-bit words. The parallel technique
can be expanded to any number of bits, see Table 1.
NOTE:
The SN74LS85 can be used as a 5-bit comparator only
when the outputs are used to drive the A0–A3 and B0–B3
inputs of another SN74LS85 as shown in Figure 2 in posi-
tions #1, 2, 3, and 4.
INPUTS
(LSB)
A0 A1 A2 A3 B0 B1 B2 B3
L
L
H
A0 A1 A2 A3 B0 B1 B2 B3
IA > B
OA > B
#5
OA < B
IA < B
IA = B
OA = B
(MSB)
A20 A21 A22 A23 B20 B21 B22 B23
A0 A1 A2 A3 B0 B1 B2 B3
IA > B
OA > B
IA < B
#1
OA < B
IA = B
OA = B
NC
A19
B19
L
INPUTS
A5 A6 A7 A8 B5 B6 B7 B8
A0 A1 A2 A3 B0 B1 B2 B3
OA > B
IA > B
#4
IA < B
OA < B
IA = B
OA = B
A10 A11 A12 A13 B10 B11 B12 B13
A0 A1 A2 A3 B0 B1 B2 B3
OA > B
IA > B
#3
OA < B
IA < B
IA = B
OA = B
A15 A16 A17 A18 B15 B16 B17 B18
A0 A1 A2 A3 B0 B1 B2 B3
OA > B
IA > B
#2
OA < B
IA < B
IA = B
OA = B
A4
L
A9
B9
NC
L
B4
A14
B14
NC
L
NC
A0 A1 A2 A3 B0 B1 B2 B3
IA > B
OA > B
IA < B
OA < B
#6
IA = B
OA = B
OUTPUTS
MSB = MOST SIGNIFICANT BIT
LSB = LEAST SIGNIFICANT BIT
L = LOW LEVEL
H = HIGH LEVEL
NC = NO CONNECTION
Figure 2. Comparison of Two 24-Bit Words
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SN74LS85
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE
(unless otherwise specified)
Limits
Symbol
VIH
VIL
VIK
VOH
Parameter
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH Voltage
2.7
–0.65
3.5
0.25
VOL
Output LOW Voltage
0.35
Input HIGH Current
A < B, A > B
Other Inputs
A < B, A > B
Other Inputs
IIL
IOS
Input LOW Current
A < B, A > B
Other Inputs
Output Short Circuit Current (Note 2)
–20
0.5
20
60
0.1
0.3
–0.4
–1.2
–100
V
µA
0.4
Min
2.0
0.8
–1.5
Typ
Max
Unit
V
V
V
V
V
Test Conditions
Guaranteed Input HIGH Voltage for
All Inputs
Guaranteed Input LOW Voltage for
All Inputs
VCC = MIN, IIN = –18 mA
VCC = MIN, IOH = MAX, VIN = VIH
or VIL per Truth Table
IOL = 4.0 mA
IOL = 8.0 mA
VCC = VCC MIN,
VIN = VIL or VIH
per Truth Table
VCC = MAX, VIN = 2.7 V
IIH
mA
VCC = MAX, VIN = 7.0 V
mA
mA
VCC = MAX, VIN = 0.4 V
VCC = MAX
VCC = MAX
ICC
Power Supply Current
20
mA
2. Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS
(TA = 25°C, VCC = 5.0 V)
Limits
Symbol
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
Parameter
Any A or B to A < B, A > B
Any A or B to A = B
A < B or A = B to A > B
A = B to A = B
A > B or A = B to A < B
Min
Typ
24
20
27
23
14
11
13
13
14
11
Max
36
30
45
45
22
17
20
26
22
17
Unit
ns
ns
ns
ns
ns
VCC = 5.0 V
CL = 15 pF
Test Conditions
AC WAVEFORMS
VIN
VOUT
1.3 V
tPHL
1.3 V
1.3 V
tPLH
1.3 V
VIN
1.3 V
tPHL
1.3 V
tPLH
1.3 V
VOUT
1.3 V
Figure 3.
Figure 4.
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