Hitachi 16-Bit Single-Chip Microcomputer
H8S/2329 Series, H8S/2328 Series
Hardware Manual
— Specifications Common to All Series —
ADE-602-171B
Rev. 3.0
4/11/02
Hitachi, Ltd.
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Preface
The H8S/2329 Series and H8S/2328 Series are series of high-performance microcontrollers with a
32-bit H8S/2000 CPU core, and a set of on-chip supporting functions required for system
configuration.
The H8S/2000 CPU can execute basic instructions in one state, and is provided with sixteen 16-bit
general registers with a 32-bit internal configuration, and a concise and optimized instruction set.
The CPU can handle a 16-Mbyte linear address space (architecturally 4 Gbytes). Programs based
on the high-level language C can also be run efficiently.
The address space is divided into eight areas. The data bus width and access states can be selected
for each of these areas, and various kinds of memory can be connected fast and easily.
Single-power-supply flash memory (F-ZTAT™) and mask ROM versions are available, providing
a quick and flexible response to conditions from ramp-up through full-scale volume production,
even for applications with frequently changing specifications.
On-chip supporting functions include a 16-bit timer pulse unit (TPU), programmable pulse
generator (PPG), 8-bit timer, watchdog timer (WDT), serial communication interface (SCI), A/D
converter, D/A converter, and I/O ports.
In addition, an on-chip DMA controller (DMAC) and data transfer controller (DTC) are provided,
enabling high-speed data transfer without CPU intervention.
Use of the H8S/2329 Series and H8S/2328 Series enables easy implementation of compact, high-
performance systems capable of processing large volumes of data.
Refer to the H8S/2600 Series, H8S/2000 Series Programming Manual for a detailed description of
the instruction set and programming-related information.
i
List of Items Revised or Added for This Version
Section
All
Page
Item
Description
H8S/2326F-ZTAT and
H8S/2321 lineup added
H8S/2324 model name
changed to H8S/2324S
1.1 Overview
1.3.1 Pin Arrangement
7
14
Table 1-1 Overview
Figure 1-7 HD64F2329E
Pin Arrangement (TFP-120:
Top View)
Figure 1-8 HD64F2329E
Pin Arrangement (FP-128:
Top View)
Table 1-2 Pin Functions in
Each Operating Mode
FP-128 pin no. 4
• Flash memory
programmer mode item
amended
H8S/2357 Series
Hardware Manual (4th
Edition) Section 2 inserted
New product lineup item
added
Newly added
15
1.3.2 Pin Functions in Each 21
Operating Mode
Section 2 CPU
31 to 73
All
3.1.2 Operating Mode
Selection (Mask ROM and
ROMless Versions, and
H8S/2329 F-ZTAT)
3.2.3 System Control
Register 2 (SYSCR2)
(F-ZTAT Version Only)
3.3.1 Mode 1
3.3.2 Mode 2
(H8S/2329F-ZTAT Only)
3.3.3 Mode 3
(H8S/2329F-ZTAT Only)
3.4 Pin Functions in Each
Operating Mode
3.5 Memory Map in Each
Operating Mode
77
Note 1 added
Table 3-2 MCU Operating
Mode Selection (Mask ROM
and ROMless Versions, and
H8S/2329 F-ZTAT)
Bit 0
Description changed and
Note added
“Modes 1 to 3” amended
to “Mode 1”
Newly added
Newly added
80, 81
81
84
Table 3-4 Pin Functions in
Each Mode
Figure 3-1 H8S/2329
Memory Map in Each
Operating Mode
Modes 2 and 3 added
Note 4 added
Added as H8S/2329 mode
2 and 3 address map
85