Hitachi 16-Bit Single-Chip Microcomputer
H8S/2678 Series
H8S/2677
HD64F2677, HD6432677
H8S/2676
HD64F2676, HD6432676
H8S/2675
HD6432675
H8S/2673
HD6432673
H8S/2670
HD6412670
Reference Manual
ADE-602-192A
Rev. 2.0
12/5/00
Hitachi, Ltd.
H8S/2678 Series, H8S/2677 F-ZTAT™,
H8S/2676 F-ZTAT™ Reference Manual
Publication Date: 1st Edition, March 2000
2nd Edition, December 2000
Published by:
Electronic Devices Sales & Marketing Group
Semiconductor & Integrated Circuits
Hitachi, Ltd.
Edited by:
Technical Documentation Group
Hitachi Kodaira Semiconductor Co., Ltd.
Copyright © Hitachi, Ltd., 2000. All rights reserved. Printed in Japan.
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s
patent, copyright, trademark, or other intellectual property rights for information contained in
this document. Hitachi bears no responsibility for problems that may arise with third party’s
rights, including intellectual property rights, in connection with use of the information
contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you
have received the latest product standards or specifications before final design, purchase or
use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability.
However, contact Hitachi’s sales office before using the product in an application that
demands especially high quality and reliability or where its failure or malfunction may directly
threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear
power, combustion control, transportation, traffic, safety equipment or medical equipment for
life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi
particularly for maximum rating, operating supply voltage range, heat radiation characteristics,
installation conditions and other characteristics. Hitachi bears no responsibility for failure or
damage when used beyond the guaranteed ranges. Even within the guaranteed ranges,
consider normally foreseeable failure rates or failure modes in semiconductor devices and
employ systemic measures such as fail-safes, so that the equipment incorporating Hitachi
product does not cause bodily injury, fire or other consequential damage due to operation of
the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document
without written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi
semiconductor products.
Main Revisions and Additions in this Edition
Page
6
Item
1.2 Block Diagram
Revisions (See Manual for Details)
Figure 1.1 Internal Block Diagram
PLLVCC and PLLVSS pins added
151
4.5.12 Burst Operation
Figure 4.29 Operation Timing in Fast Page Mode (1)
Title in parentheses amended
CAST = 1
→
CAST = 0
286
5.16.3 Pin Functions
Table 5.35 Port G Pin Functions
PG3 to PG0: Description amended
291
5.17.3 Pin Functions
Table 5.37 Port H Pin Functions
PH1 and PH0: Description amended
295, 296 5.18.1 Port States in Each
Processing State
378 to
380
7.1.2 DC Characteristics
Table 5.38 I/O Port States in Each Processing State
PG5 and PG4 states amended
Table 7.2 DC Characteristics
Entire table amended
Table 7.3 Permissible Output Currents
Max. values of
ΣI
OL
and
Σ–I
OH
amended
384
414
417
7.2.1 Absolute Maximum
Ratings
7.1.3 AC Characteristics
Figure 7.3 (2) Oscillation Stabilization Timing added
Figure 7.36 WDT Output Timing amended
Table 7.11 Absolute Maximum Ratings
Note: Operating temperature ranges amended
Table 7.12 DC Characteristics
Entire table amended
420
Table 7.13 Permissible Output Currents
Max. values of
ΣI
OL
and
Σ–I
OH
amended
432, 433 7.2.6 Flash Memory
Characteristics
Conditions: Operating temperature range amended
Unit of t
E
amended
z and
γ
amended
418, 419 7.2.2 DC Characteristics
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