HY62V16100-(I)/HY62U16100-(I) Series
64Kx16bit CMOS SRAM
DESCRIPTION
The HY62V16100-(I)/HY62U16100-(I) is a high-
speed, low power and 1M bits CMOS SRAM
organized as 65,536 words by 16 bits. The
HY62V16100-(I)/ HY62U16100-(I) uses sixteen
common input and output lines and has an output
enable pin which operates faster than address
access time at a read cycle. The device is
fabricated using HYUNDAI's advanced CMOS
process and designed with high-speed low power
circuit technology. It is particulary well suited for
being used in high-density and low power system
applications.
FEATURES
•
Fully static operation and Tri-state output
•
TTL compatible inputs and outputs
•
Data Byte Control
- LB : I/O1 ~ I/O8, UB : I/O9 ~ I/O16
•
Battery backup(L/LL-part)
- 2.0V(min) data retention
•
Standard pin configuration
- 44pin 400mil TSOP-II
(Standard and Reversed)
Product
Supply
Speed
Operation
Standby Current(uA)
No.
Voltage(V)
(ns)
Current(mA)
L
LL
HY62V16100
3.3
85/100/120
5
50
10
HY62V16100-I
3.3
85/100/120
5
50
15
HY62U16100
3.0
100/120/150
5
50
10
HY62U16100-I
3.0
100/120/150
5
50
10
Note 1. E.T. : Extended Temperature, Normal : Normal Temperature
2. Current value is max.
Temperature.
(°C)
0~70(Normal)
-40~85(E.T.)
0~70(Normal)
-40~85(E.T.)
PIN CONNECTION
BLOCK DIAGRAM
SENSE AMP
A1~A7
ADD INPUT
BUFFER
ROW
DECODER
I/O1
A4
A3
A2
A1
A0
/CS
I/O1
I/O2
I/O3
I/O4
Vcc
GND
I/O5
I/O6
I/O7
I/O8
/WE
A15
A14
A13
A12
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
/OE
/UB
/LB
I/O16
I/O15
I/O14
I/O13
GND
Vcc
I/O12
I/O11
I/O10
I/O9
NC
A8
A9
A10
A11
NC
NC
A12
A13
A14
A15
/WE
I/O8
I/O7
I/O6
I/O5
GND
Vcc
I/O4
I/O3
I/O2
I/O1
/CS
A0
A1
A2
A3
A4
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
NC
A11
A10
A9
A8
NC
I/O9
I/O10
I/O11
I/O12
Vcc
GND
I/O13
I/O14
I/O15
I/O16
/LB
/UB
/OE
A7
A6
A5
A14
A15
A8
A9
A10
A11
A12
A13
A0
/CS
/OE
/LB
/UB
/WE
PRE-DECODER
COLUMN
DECODER
ADD INPUT
BUFFER
MEMORY ARRAY
512x128x16
WRITE DRIVER
OUTPUT
BUFFER
I/O8
I/O9
ADD INPUT
BUFFER
BLOCK
DECODER
I/O16
TSOP-II(Standard)
TSOP-II(Reversed)
PIN DESCRIPTION
Pin Name
/CS
/WE
/OE
/LB
/UB
Pin Funtion
Chip Select
Write Enable
Output Enable
Low Byte Control(I/O1~I/O8)
Upper Byte Control(I/O9~I/O16)
Pin Name
I/O1~I/O16
A0~A15
Vcc
Vss
NC
Pin Funtion
Data Input/Output
Address Input
Power(3.3V/3.0V)
Ground
No Connection
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev.07 /Jan.99
Hyundai Semiconductor
HY62V16100-(I)/HY62U16100-(I) Series
ORDERING INFORMATION
Part No.
HY62V16100LT2
HY62V16100LLT2
HY62V16100LR2
HY62V16100LLR2
HY62V16100LT2-I
HY62V16100LLT2-I
HY62V16100LR2-I
HY62V16100LLR2-I
HY62U16100LT2
HY62U16100LLT2
HY62U16100LR2
HY62U16100LLR2
HY62U16100LT2-I
HY62U16100LLT2-I
HY62U16100LR2-I
HY62U16100LLR2-I
Speed
85/100/120
85/100/120
85/100/120
85/100/120
85/100/120
85/100/120
85/100/120
85/100/120
100/120/150
100/120/150
100/120/150
100/120/150
100/120/150
100/120/150
100/120/150
100/120/150
Power
L-part
LL-part
L-part
LL-part
L-part
LL-part
L-part
LL-part
L-part
LL-part
L-part
LL-part
L-part
LL-part
L-part
LL-part
Temp.
Package
TSOP-II Standard
TSOP-II Standard
TSOP-II Reversed
TSOP-II Reversed
TSOP-II Standard
TSOP-II Standard
TSOP-II Reversed
TSOP-II Reversed
TSOP-II Standard
TSOP-II Standard
TSOP-II Reversed
TSOP-II Reversed
TSOP-II Standard
TSOP-II Standard
TSOP-II Reversed
TSOP-II Reversed
E.T.
E.T.
E.T.
E.T.
E.T.
E.T.
E.T.
E.T.
Note 1. E.T. : Extended Temperature, Blank : Normal Temperature
ABSOLUTE MAXIMUM RATING (1)
Symbol
Vcc, V
IN,
V
OUT
T
A
Parameter
Power Supply, Input/Output Voltage
Operating Temperature
Rating
-0.3 to 4.6
0 to 70
-40 to 85
T
STG
P
D
I
OUT
T
SOLDER
Storage Temperature
Power Dissipation
Data Output Current
Lead Soldering Temperature & Time
-65 to 125
1.0
50
260
•
10
Unit
V
°C
°C
°C
W
mA
°C•sec
Remark
HY62V16100
HY62U16100
HY62V16100-I
HY62U16100-I
Note
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent
damage to the device. This is stress rating only and the functional operation of the device under these or
any other conditions above those indicated in the operation of this specification is not implied.
Exposure to the absolute maximum rating conditions for extended period may affect reliablity.
RECOMMENDED DC OPERATING CONDITION
T
A
= 0°C to 70°C (Normal)/ -40°C to 85°C (E.T.)
Symbol
Parameter
Product
Vcc
Supply Voltage
HY62V16100-(I)
HY62U16100-(I)
Vss
Ground
HY62V16100-(I)
HY62U16100-(I)
V
IH
Input High Voltage HY62V16100-(I)
HY62U16100-(I)
V
IL
Input Low Voltage HY62V16100-(I)
HY62U16100-(I)
Min.
3.0
2.7
0
2.2
-0.3
Typ.
3.3
3.0
0
-
-
Max.
3.6
3.3
0
Vcc+0.3
0.4
Unit
V
V
V
V
V
Rev.07 /Jan.99
2
HY62V16100-(I)/HY62U16100-(I) Series
TRUTH TABLE
/CS
H
L
L
L
/WE
X
H
X
H
/OE
X
H
X
L
/LB
X
X
H
L
H
L
L
H
L
/UB
X
X
H
H
L
L
H
L
L
Mode
Not Selected
Output Disabled
Read
I/O Pin
I/O1~I/O8
I/O9~I/O16
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
D
OUT
Hi-Z
Hi-Z
D
OUT
D
OUT
D
OUT
D
IN
Hi-Z
Hi-Z
D
IN
D
IN
D
IN
Supply Current
I
SB
, I
SB1
Icc
Icc
L
L
X
Write
Icc
Note:
1. H=V
IH
, L=V
IL
, X=don't care
2. UB, LB(Upper, Lower Byte enable)
These active LOW inputs allow indiviual bytes to be written or read.
When LB is LOW, data is written or read to the lower byte, I/O1 -I/O8.
When UB is LOW, data is written or read to the Upper byte, I/O9 -I/O16.
DC ELECTRICAL CHARACTERISTICS
Vcc = 3.3V
±
10%/3.0V
±10%,
T
A
= 0°C to 70°C (Normal)/ -40°C to 85°C (E.T.), unless otherwise specified
Symbol
Parameter
Test Condition
Min Typ Max Unit
I
LI
Input Leakage Current
Vss < V
IN
< Vcc
-1
-
1
uA
I
LO
Output Leakage Current
Vss < V
OUT
< Vcc,
-1
-
1
uA
/CS = V
IH
or
/
OE
=
V
IH
or /WE = V
IL
or /UB = V
IH
or /LB = V
IH
Icc
Operating Power Supply
/CS = V
IL
, V
IN
= V
IH
or V
IL
-
-
5
mA
Current
I
I/O = 0mA
I
CC1
Average Operating Current
/CS = V
IL,
Min Duty Cycle = 100%
-
-
50
mA
I
I/O = 0mA
I
SB
TTL Standby Current
/CS = V
IH
-
-
0.5
mA
(TTL Input)
I
SB1
Standby HY62V16100
/CS = Vcc – 0.2V
L
-
-
50
uA
Current
LL
-
-
10
uA
(CMOS
HY62V16100-I
L
50
uA
Input)
LL
-
-
15
uA
HY62U16100
L
-
-
50
uA
LL
-
-
10
uA
HY62U16100-I
L
-
-
50
uA
LL
-
-
10
uA
V
OL
Output Low Voltage
I
OL
= 2.1mA
-
-
0.4
V
V
OH
Output High Voltage
I
OH =
-1mA
2.2
-
-
V
Note : Typical values are at Vcc = 3.3V/3.0V, T
A
= 25°C
Rev.07 /Jan.99
3
HY62V16100-(I)/HY62U16100-(I) Series
AC CHARACTERISTICS(I)
Vcc = 3.3V
±
10%, T
A
= 0°C to 70°C (Normal)/ -40°C to 85°C (E.T.), unless otherwise specified
-85
-10
-12
# Symbol
Parameter
Min.
Max. Min.
Max. Min
Max.
READ CYCLE
1
tRC
Read Cycle Time
85
-
100
-
120
-
2
tAA
Address Access Time
-
85
-
100
-
120
3
tACS
Chip Select Access Time
-
85
-
100
-
120
4
tOE
Output Enable to Output Valid
-
45
-
50
-
60
5
tBA
/LB, /UB Access Time
-
45
-
50
-
60
6
tCLZ
Chip Select to Output in Low Z
10
-
10
-
10
-
7
tOLZ
Output Enable to Output in Low Z
10
-
10
-
10
-
8
tBLZ
/LB. /UB Enable to Output in Low Z
10
-
10
-
10
-
9
tCHZ
Chip Deselection to Output in High Z
0
30
0
30
0
40
10 tOHZ
Out Disable to Output in High Z
0
30
0
30
0
40
11 tBHZ
/LB, /UB Disable to Output in High Z
0
30
0
30
0
40
12 tOH
Output Hold from Address Change
20
-
20
-
20
-
WRITE CYCLE
13 tWC
Write Cycle Time
85
-
100
-
120
-
14 tCW
Chip Selection to End of Write
70
-
80
-
100
-
15 tAW
Address Valid to End of Write
70
-
80
-
100
-
16 tBW
/LB, /UB Valid to End of Write
70
-
80
-
100
-
17 tAS
Address Set-up Time
0
-
0
-
0
-
18 tWP
Write Pulse Width
55
-
70
-
85
-
19 tWR
Write Recovery Time
0
-
0
-
0
-
20 tWHZ
Write to Output in High Z
0
30
0
30
0
40
21 tDW
Data to Write Time Overlap
35
-
40
-
50
-
22 tDH
Data Hold from Write Time
0
-
0
-
0
-
23 tOW
Output Active from End of Write
10
-
10
-
10
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Rev.07 /Jan.99
4
HY62V16100-(I)/HY62U16100-(I) Series
AC CHARACTERISTICS(II)
Vcc = 3.0V
±
10%, T
A
= 0°C to 70°C (Normal)/ -40°C to 85°C (E.T.), unless otherwise specified
-10
-12
-15
# Symbol
Parameter
Min.
Max. Min.
Max. Min
Max.
READ CYCLE
1
TRC
Read Cycle Time
100
-
120
-
150
-
2
TAA
Address Access Time
-
100
-
120
-
150
3
TACS
Chip Select Access Time
-
100
-
120
-
150
4
tOE
Output Enable to Output Valid
-
50
-
60
-
75
5
tBA
/LB, /UB Access Time
-
50
-
60
-
75
6
tCLZ
Chip Select to Output in Low Z
10
-
10
-
10
-
7
tOLZ
Output Enable to Output in Low Z
10
-
10
-
10
-
8
tBLZ
/LB. /UB Enable to Output in Low Z
10
-
10
-
10
-
9
tCHZ
Chip Deselection to Output in High Z
0
30
0
40
0
50
10 tOHZ
Out Disable to Output in High Z
0
30
0
40
0
50
11 tBHZ
/LB, /UB Disable to Output in High Z
0
30
0
40
0
50
12 tOH
Output Hold from Address Change
20
-
20
-
20
-
WRITE CYCLE
13 tWC
Write Cycle Time
100
-
120
-
150
-
14 tCW
Chip Selection to End of Write
80
-
100
-
120
-
15 tAW
Address Valid to End of Write
80
-
100
-
120
-
16 tBW
/LB, /UB Valid to End of Write
80
-
100
-
120
-
17 tAS
Address Set-up Time
0
-
0
-
0
-
18 tWP
Write Pulse Width
70
-
85
-
100
-
19 tWR
Write Recovery Time
0
-
0
-
0
-
20 tWHZ
Write to Output in High Z
0
30
0
40
0
50
21 tDW
Data to Write Time Overlap
40
-
50
-
60
-
22 tDH
Data Hold from Write Time
0
-
0
-
0
-
23 tOW
Output Active from End of Write
10
-
10
-
10
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
AC TEST CONDITIONS
T
A
= 0°C to 70°C (Normal) / -40°C to 85°C (E.T.), unless otherwise specified
PARAMETER
Value
Input Pulse Level
0.4V to 2.2V
Input Rise and Fall Time
5ns
Input and Output Timing Reference Level
1.5V
Output Load
CL = 100pF + 1TTL Load
AC TEST LOADS
TTL
CL(1)
Note : Including jig and scope capacitance
Rev.07 /Jan.99
5
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