NCV7703
Triple Half-Bridge Driver
with SPI Control
The NCV7703 is a fully protected Triple Half−Bridge Driver
designed specifically for automotive and industrial motion control
applications. The three half−bridge drivers have independent control.
This allows for high side, low side, and H−Bridge control. H−Bridge
control provides forward, reverse, brake, and high impedance states.
The drivers are controlled via a standard SPI (Serial Peripheral
Interface). This device is fully compatible with ON Semiconductor’s
NCV7708 Double Hex Driver.
Features
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SOIC−14
D2 SUFFIX
CASE 751A
14
1
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Ultra Low Quiescent Current in Sleep Mode, 1
mA
for V
S
and V
CC
Power Supply Voltage Operation down to 5 V
3 High−Side and 3 Low−Side Drivers Connected as Half−Bridges
Internal Free−Wheeling Diodes
Configurable as H−Bridge Drivers
0.5 A Continuous (1 A peak) Current
R
DS(on)
= 0.8
W
(typ)
5 MHz SPI Control with Daisy Chain Capability
Compliance with 5 V and 3.3 V Systems
Overvoltage and Undervoltage Lockout
Fault Reporting
1.4 A Overcurrent Threshold Detection with Optional Shutdown
3 A Current Limit with Auto Shutdown
Overtemperature Warning and Protection Levels
Internally Fused Leads in SOIC−14 Package for Better Thermal
Performance
•
ESD Protection up to 6 kV
•
This is a Pb−Free Device
Typical Applications
MARKING DIAGRAM
14
NCV7703G
AWLYWW
1
NCV7703 = Specific Device Code
A
= Assembly Location
WL
= Wafer Lot
Y
= Year
WW
= Work Week
G
= Pb−Free Package
PIN CONNECTIONS
GND
OUT3
V
S
CSB
SI
SCLK
GND
GND
OUT1
OUT2
V
CC
EN
SO
GND
•
Automotive
•
Industrial
•
DC Motor Management
V
S
V
S
V
S
ORDERING INFORMATION
Device
NCV7703D2G
NCV7703D2R2G
Package
SOIC−14
(Pb−Free)
Shipping†
55 Units / Rail
SOIC−14 2500 / Tape & Reel
(Pb−Free)
OUT1
M
OUT2
M
OUT3
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Figure 1. Cascaded Application
©
Semiconductor Components Industries, LLC, 2008
September, 2008
−
Rev. 2
1
Publication Order Number:
NCV7703/D
NCV7703
V
S
DRIVE 1
V
S
Charge
Pump
Control
Logic
High−Side
Driver
Waveshaping
V
S
Low−Side
Driver
OUT1
EN
ENABLE
OSC
clk
V
S
clk
V
CC
UVLO
Reference
& Bias
Fault
Detect
Channel Enable
SO
SI
SPI
SCLK
CSB
V
S
Undervoltage
Lockout
16 Bit
Logic
and
Latch
Fault
Waveshaping
Under−Load
Overcurrent
Thermal
Warning/Shutdown
V
S
DRIVE 2
clk
Channel Enable
Fault
V
S
DRIVE 3
clk
Channel Enable
Fault
OUT2
OUT3
V
S
Overvoltage
Lockout
Figure 2. Block Diagram
PACKAGE PIN DESCRIPTION
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Symbol
GND*
OUT3
V
S
CSB
SI
SCLK
GND*
GND*
SO
EN
V
CC
OUT2
OUT1
GND*
Ground. Connect all grounds together.
Half Bridge Output 3.
Description
GND
Power Supply input for the output drivers and internal supply voltage.
Chip Select Bar. Active low serial port operation.
Serial Input
Serial Clock
Ground. Connect all grounds together.
Ground. Connect all grounds together.
Serial Output
Enable. Logic high wakes the IC up from a sleep mode.
Power supply input for internal logic.
Half Bridge Output 2.
Half Bridge Output 1.
Ground. Connect all grounds together.
* Pins 1, 7, 8, and 14 are internally shorted together. It is recommended to also short these pins externally.
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2
NCV7703
ENABLE
WDI
RESET
Vout
NCV8518
D1*
1N4001
VBAT
D2**
22
mF
Delay
120k
GND
10
mF
V
CC
EN
V
S
OUT1
M
OUT2
CSB
SI
SCLK
SO
GND
GND
GND
GND
OUT3
microprocessor
NCV7703
M
GND
* D1 optional. For use where reverse battery protection is required.
** D2 optional. For use where load dump exceeds 40V.
Figure 3. Application Circuit
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3
+
−
Wake Up
NCV7703
MAXIMUM RATINGS
Rating
Power Supply Voltage (V
S
)
(DC)
(AC), t < 500 ms, Ivs >
−2
A
Output Pin OUTx
(DC)
(AC), t < 500 ms, IOUTx >
−2
A
Pin Voltage
(Logic Input pins, SI, SCLK, CSB, SO, EN, V
CC
)
Output Current (OUTx)
(DC)
(AC) (50 ms pulse, 1 s period)
Electrostatic Discharge, Human Body Model,
V
S
, OUT1, OUT2, OUT3 (Note 3)
Electrostatic Discharge, Human Body Model,
all other pins (Note 3)
Electrostatic Discharge, Machine Model,
V
S
, OUT1, OUT2, OUT3 (Note 3)
Electrostatic Discharge, Machine Model,
all other pins (Note 3)
Electrostatic Discharge, Charge Device Model (Note 3)
Operating Junction Temperature
Storage Temperature Range
Moisture Sensitivity Level (MAX 260°C Processing)
Value
−0.3
to 40
−1
V
−0.3
to 40
−1
−0.3
to 7
V
A
−1.8
to 1.8
Internally Limited
6
2
300
200
1
−40
to 150
−55
to 150
MSL3
kV
kV
V
V
kV
°C
°C
−
Unit
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Thermal Parameters
14 Pin Fused SOIC Package
Junction−to−Lead (psi−JL8,
Y
JL8
) or Pins 1, 7, 8, 14
Junction−to−Ambient (R
qJA
,
q
JA
)
1. 1−oz copper, 67 mm
2
copper area, 0.062″ thick FR4.
2. 1−oz copper, 645 mm
2
copper area, 0.062″ thick FR4.
3. This device series incorporates ESD protection and is tested by the following methods:
ESD HBM tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD MM tested per AEC−Q100−003 (EIA/JESD22−A115)
ESD CDM tested per EIA/JES D22/C101, Field Induced Charge Model
Test Conditions (Typical Value)
min−pad board
(Note 1)
23
122
1″ pad board
(Note 2)
22
83
°C/W
°C/W
Unit
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4
NCV7703
ELECTRICAL CHARACTERISTICS
(−40°C
≤
T
J
≤
150°C, 5.5 V
≤
V
S
≤
40 V, 3 V
≤
V
CC
≤
5.25 V, EN = V
CC
, unless otherwise specified)
Characteristic
GENERAL
Supply Current (V
S
)
Sleep Mode (Note 5)
V
S
= 13.2 V, OUTx = 0 V
EN = SI = SCLK = 0 V, CSB = V
CC
0 V < V
CC
< 5.25 V
(T
J
=
−40°C
to 85°C)
V
S
= 13.2 V, OUTx = 0 V
EN = SI = SCLK = 0 V, CSB = V
CC
0 V < V
CC
< 5.25 V, T
J
= 25°C
Supply Current (V
S
)
Active Mode
Supply Current (V
CC
)
Sleep Mode (Note 6)
Supply Current (V
CC
)
Active Mode
V
CC
Power−On−Reset Threshold
V
S
Undervoltage Detection
V
S
Overvoltage Detection
Thermal Warning (Note 4)
Thermal Shutdown (Note 4)
Threshold V
S
decreasing
Hysteresis
Threshold V
S
increasing
Hysteresis
Threshold
Hysteresis
Threshold
Hysteresis
EN = V
CC
, 5.5 V < V
S
< 35 V
No Load
V
CC
= CSB, EN = SI = SCLK = 0 V
(T
J
=
−40°C
to 85°C)
EN = V
CC
−
1.0
5.0
mA
Conditions
Min
Typ
Max
Unit
−
−
2.0
−
−
−
2.60
4.3
100
34.0
1.5
120
−
155
−
1.05
2.0
0
1.5
2.80
4.7
−
37.5
3.5
145
30
175
30
1.20
4.0
2.5
3.0
3.00
5.1
400
40.0
5.5
170
−
195
−
−
mA
mA
mA
V
V
mV
V
°C
°C
°C/°C
Ratio of Thermal Shutdown to Thermal
Warning temperature (Note 4)
OUTPUTS
Output R
DS(on)
(Source)
I
out
=
−500
mA
V
S
= 13.2 V, T
J
= 25°C
V
S
= 13.2 V
8 V
≤
V
S
≤
40 V
5.5 V
≤
V
S
≤
8 V, T
J
= 25°C
5.5 V
≤
V
S
≤
8 V
Output R
DS(on)
(Sink)
I
out
= 500 mA
V
S
= 13.2 V, T
J
= 25°C
V
S
= 13.2 V
8 V
≤
V
S
≤
40 V
5.5 V
≤
V
S
≤
8 V, T
J
= 25°C
5.5 V
≤
V
S
≤
8 V
Source Leakage Current
Sum of I(OUTx) x = 1, 2, 3
OUTx = 0 V, V
S
= 40 V, EN = 0 V
CSB = V
CC
0 V < V
CC
< 5.25 V
Sum(I(OUTx)
OUTx = 0 V, V
S
= 40 V, EN = 0 V
CSB = V
CC
0 V < V
CC
< 5.25 V, T
J
= 25°C
Sum(I(OUTx)
−
−
−
−
−
−
−
−
−
−
−5.0
0.8
−
−
1.3
−
0.8
−
−
1.3
−
−
0.95
1.5
1.7
−
2.0
0.95
1.5
1.7
−
2.0
−
W
W
W
W
W
W
W
W
W
W
mA
−1.0
−
−
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