Series 218 SMT DIP
®
SMT Half Pitch DIP
Switch–Auto
Placeable
Features
Optimized Mechanical Features
• Removable tape seal to withstand IR vapor phase
or wave soldering temperatures and board washing
• Gull-wing and "J" bend terminal configurations
• Low profile actuators prevent accidental actuation
• SPST configuration available
Optimized Contact System
• Redundant, wiping contact
• Contactor does not deflect during actuation
• 0.6 mm/.024" actuator travel
Materials
•
•
•
•
Gold plated beryllium copper contacts
Gold flash coated terminals
High temperature body and actuator materials
RoHS Compliant
Electrical and Mechanical Specifications
Sw i t c h Fu n c t i o n
SPST - 2,4,6,8,10, and 12 positions
Sw i t c h Co n t ac t Res i s t an ce
100 milliohms maximum initial
100 milliohms maximum at end of life
In s u l at i o n Res i s t an c e
100 megohms minimum across open switch
100 megohms minimum between adjacent closed
switches
Di el ec t r i c St r en g t h
350 VAC maximum for 1 minute between adjacent
switches
No n s w i t c h i n g Rat i n g
100 mA or 50 VDC maximum
Sw i t c h Cap ac i t an c e
10 pF maximum between adjacent closed switches
Op er at i n g Tem p er at u r e
- 55°C to +85°C
A c t u at i o n L i f e
1,000 cycles switching 25 mA @ 24 VDC
Co p l an ar i t y
Coplanarity of 0.1mm/.004" maximum
Allowable Solder Time
IR and Vapor Phase - up to 60 seconds at 260°C
Wave - up to 5 seconds at 260°C
Vi b r at i o n
Per MIL-STD-202F, method 204D, condition B
(.06" or 15G’s between 10 HZ to 2 KHz) with
no contact inconsistencies greater than 1
microsecond.
Sh o c k
Per MIL-STD-202F, method 213B, condition A
(50G’s) with no contact inconsistencies greater
than 1 microsecond.
Seal i n g
Standard bottom seal
Optional top tape seal
Mar k i n g
Special marking available-consult CTS
Packaging
Standard : Anti-Static tube Packaging
Optional : Tape and Reel Packaging
Ro HS Co m p l i an c e
Compliant with European Union RoHS Directive
1-2
CTS Electronic Components
© 2007 CTS Corporation. All rights reserved. Information subject to change.
www.ctscorp.com
11/09/07
FPGA/CPLD
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