J210, J211, J212
SSTJ210, SSTJ211, SSTJ212
LOW NOISE N-CHANNEL JFET
GENERAL PURPOSE AMPLIFIER
FEATURES
HIGH GAIN
g
fs
=7000µmho MINIMUM (J211, J212)
I
GSS
= 100pA MAXIMUM
G
TO-92
TO-92
D
Plastic
HIGH INPUT IMPEDENCE
LOW CAPACITANCE
C
ISS
= 5pF TYPICAL
ABSOLUTE MAXIMUM RATINGS
@ 25 °C (unless otherwise stated)
Gate-Drain or Gate-Source Voltage
Gate Current
Total Device Dissipation @25°C Ambient
(Derate 3.27 mW/°C)
Operating Temperature Range
-25V
10mA
360mW
-55 to +150 °C
S
G
D S
TO-92
TOP VIEW
J210, J211, J212
SOT-23
TOP VIEW
SSTJ210, SSTJ211, SSTJ212
ELECTRICAL CHARACTERISTICS @ 25 °C (unless otherwise stated)
SYMBOL CHARACTERISTICS
SSTJ210
SSTJ211
SSTJ212
UNITS
MIN TYP MAX MIN TYP MAX MIN TYP MAX
I
GSS
Gate Reverse Current
--
-- -100 --
-- -100 --
-- -100
pA
V
GS(off)
BV
GSS
I
DSS
I
G
g
fs
g
os
C
ISS
C
rss
e
n
Gate-Source Cutoff Voltage
Gate-Source Breakdown Voltage
Drain Saturation Current
Gate Current
Common-Source Forward
Transconductance
Common-Source Output
Conductance
Common-Source Input
Capacitance
Common-Source Reverse
Transfer Capacitance
Equivalent Short-Circuit Input
Noise Voltage
-1
-25
2
--
4,000
--
--
-
-
--
--
--
-10
--
--
4
1
10
-3
--
15
--
-2.5
-25
7
--
--
--
--
-10
--
--
4
1
10
-4.5
--
20
--
-4
-25
15
--
--
--
--
-10
--
--
4
1
10
-6
--
40
--
12,000
µmho
150
--
--
--
--
--
--
--
200
--
--
--
--
--
--
--
200
--
pF
--
--
nV√Hz
V
mA
pA
CONDITIONS
V
DS
= 0, V
GS
= -15V (NOTE 1)
V
DS
= 15V, I
D
= 1nA
V
DS
= 0, I
G
= -1µA
V
DS
= 15V, V
GS
=0 (NOTE 2)
V
DS
= 10V, I
D
=1mA (NOTE 1)
f=1kHz
12,000 6,000
12,000 7,000
V
DS
= 15V, V
GS
=0
f=1MHz
f=1kHz
NOTE
1. Approximately doubles for every 10°C increase in T
A
.
2. Pulse test duration = 2ms.
Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is assumed for its
use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Linear Integrated Systems.
Linear Integrated Systems (LIS) is a 25-year-old, third-generation precision semiconductor company providing high-quality
discrete components. Expertise brought to LIS is based on processes and products developed at Amelco, Union Carbide, Intersil
and Micro Power Systems by company President John H. Hall. Hall, a protégé of Silicon Valley legend Dr. Jean Hoerni, was the
director of IC Development at Union Carbide, Co-Founder and Vice President of R&D at Intersil, and Founder/President of Micro
Power Systems.
Linear Integrated Systems
•
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