NCP1597A
1 MHz, 2.0 A Synchronous
Buck Regulator
The NCP1597A family are fixed 1 MHz, high−output−current,
synchronous PWM converters that integrate a low−resistance,
high−side P−channel MOSFET and a low−side N−channel MOSFET.
The NCP1597A utilizes current mode control to provide fast transient
response and excellent loop stability. It regulates input voltages from
4.0 V to 5.5 V down to an output voltage as low as 0.8 V and is able to
supply up to 2.0 A.
The NCP1597A includes an internally fixed switching frequency
(F
SW
), and an internal soft−start to limit inrush currents. Using the EN
pin, shutdown supply current is reduced to 3
mA
maximum.
Other features include cycle−by−cycle current limiting,
short−circuit protection, power saving mode and thermal shutdown.
Features
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MARKING
DIAGRAM
1
DFN6
CASE 506AH
1
1597A
AYWWG
G
•
Input Voltage Range: from 4.0 V to 5.5 V
•
Internal 140 mW High−Side Switching P−Channel MOSFET and
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
90
mW
Low−Side N−Channel MOSFET
Fixed 1 MHz Switching Frequency
Cycle−by−Cycle Current Limiting
Overtemperature Protection
Internal Soft−Start
Start−up with Pre−Biased Output Load
Adjustable Output Voltage Down to 0.8 V
Power Saving Mode During Light Load
These are Pb−Free Devices
DSP Power
Hard Disk Drivers
Computer Peripherals
Home Audio
Set−Top Boxes
Networking Equipment
LCD TV
Wireless and DSL/Cable Modem
USB Power Devices
A
= Assembly Location
Y
= Year
WW
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
FB 1
GND 2
LX 3
6 EN
5 VCC
4 VCCP
ORDERING INFORMATION
Device
NCP1597AMNTWG
Package
DFN6
(Pb−Free)
Shipping
†
3000 / Tape &
Reel
Applications
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2010
June, 2010
−
Rev. 0
1
Publication Order Number:
NCP1597/D
NCP1597A
BLOCK DIAGRAM
NCP1597A
VCCP
VCC
Power Reset
UVLO
THD
Hiccup
+
CA
−
NC/EN
+
OSC
Soft−Start
PMOS
M1
Vref
FB
+
+ gm
−
−
PWM
+
Control
Logic
LX
GND
Figure 1. Block Diagram
PIN DESCRIPTIONS
Pin No
1
2
3
4
5
6
EP
Symbol
FB
GND
LX
V
CCP
V
CC
EN
PAD
Description
Feedback input pin of the Error Amplifier. Connect a resistor divider from the converter’s output
voltage to this pin to set the converter’s output voltage.
Ground pin. Connect to thermal pad.
The drains of the internal MOSFETs. The output inductor should be connected to this pin.
Power input for the power stage
Input supply pin for internal bias circuitry. A 0.1
mF
ceramic bypass capacitor is preferred to connect
to this pin.
Logic input to enable the part. Logic high to turn on the part and logic low to shut off the part.
Exposed pad of the package provides both electrical contact to the ground and good thermal contact
to the PCB. This pad must be soldered to the PCB for proper operation.
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2
NCP1597A
APPLICATION CIRCUIT
V
in
4.0 V
−
5.5 V
VCCP
VCC
NC/EN
LX
GND
FB
V
out
Figure 2. NCP1597A
ABSOLUTE MAXIMUM RATINGS
Rating
Power Supply Pin (Pin 4, 5) to GND
Symbol
V
in
Value
6.5
−0.3
(DC)
−1.0
(t < 100 ns)
V
in
+ 0.3
−0.6
(DC)
−1.0
(t < 100 ns)
6.0
−0.3
(DC)
−1.0
(t < 100 ns)
T
A
T
J
T
S
R
qJA
−40
to +85
−40
to +150
−55
to +150
68.5
Unit
V
LX to GND
V
All other pins
V
Operating Temperature Range
Junction Temperature
Storage Temperature Range
Thermal Resistance Junction−to−Air (Note 1)
°C
°C
°C
°C/W
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. R
qJA
measured on approximately 1x1 inch sq. of 1 oz. Copper.
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3
NCP1597A
ELECTRICAL CHARACTERISTICS
(V
in
= 4.0 V
−
5.5 V, V
out
= 1.2 V, T
J
= +25°C for typical value;
−40°C
< T
J
< 85°C for min/max values unless noted otherwise)
Parameter
V
in
Input Voltage Range
V
CC
UVLO Threshold
UVLO Hysteresis
V
CC
Quiescent Current
V
CCP
Quiescent Current
V
in
Shutdown Supply Current (Note 2)
FEEDBACK VOLTAGE
Reference Voltage
Feedback Input Bias Current
Feedback Voltage Line Regulation
PWM
Maximum Duty Cycle (Regulating)
Minimum Controllable ON Time (Note 2)
PULSE−BY−PULSE CURRENT LIMIT
Pulse−by−Pulse Current Limit (Regulation)
Pulse−by−Pulse Current Limit (Soft−Start)
OSCILLATOR
Oscillator Frequency
MOSFET
High Side MOSFET ON Resistance
High Side MOSFET Leakage (Note 2)
Low Side MOSFET ON Resistance
Low Side MOSFET Leakage (Note 2)
ENABLE (NCP1597A)
EN HI Threshold
EN LO Threshold
EN Hysteresis
EN Pullup Current
SOFT−START
Soft−Start Ramp Time
Hiccup Timer
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
2. Guaranteed by design. Not production tested.
185
30
°C
°C
t
SS
F
SW
= 1 MHz
1.0
2.0
ms
ms
ENHI
ENLO
200
1.4
3.0
1.4
0.4
V
V
mV
mA
R
DS(on)
HS
R
DS(on)
LS
I
DS
= 100 mA, V
GS
= 5 V
V
EN
= 0 V, V
SW
= 0 V
I
DS
= 100 mA, V
GS
= 5 V
V
EN
= 0 V, V
SW
= 5 V
90
140
200
10
125
10
mW
mA
mW
mA
F
SW
0.87
1.0
1.13
MHz
I
LIM
I
LIMSS
2.7
4.0
3.9
5.3
4.3
6.1
A
A
83
85
50
%
ns
V
ref
I
FB
V
FB
= 0.8 V
V
in
= 4.0 V to 5.5 V
0.788
0.800
10
0.06
0.812
100
V
nA
%/V
I
inVCC
I
inVCCP
I
QSHDN
V
in
= 5 V,V
FB
= 1.5 V, (No Switching)
V
in
= 5 V,V
FB
= 1.5 V, (No Switching)
EN = 0 V
Symbol
V
in
Test Conditions
Min
4.0
3.2
3.5
275
1.7
25
1.8
3.0
2.0
Typ
Max
5.5
3.8
Unit
V
V
mV
mA
mA
mA
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NCP1597A
TYPICAL OPERATING CHARACTERISTICS
3.7
3.6
3.5
UVLO (V)
3.4
3.3
UVLO Falling Threshold
3.2
3.1
−40
UVLO Rising Threshold
V
FB
, FB INPUT THRESHOLD (V)
85
815
810
805
800
795
790
785
−40
−15
10
35
60
−15
10
35
60
85
T
A
, AMBIENT TEMPERATURE (°C)
T
A
, AMBIENT TEMPERATURE (°C)
Figure 3. Undervoltage Lockout vs.
Temperature
1.3
f
SW
, SWITCH FREQUENCY (MHz)
1.2
1.1
1.0
0.9
0.8
0.7
−40
6.0
5.5
5.0
4.5
4.0
3.5
−40
Figure 4. Feedback Input Threshold vs.
Temperature
I
LIM
, CURRENT LIMIT (A)
I
LIM
(Soft−Start)
I
LIM
(Regulation)
−15
10
35
60
85
−15
10
35
60
85
T
A
, AMBIENT TEMPERATURE (°C)
T
A
, AMBIENT TEMPERATURE (°C)
Figure 5. Switching Frequency vs.
Temperature
2.0
1.8
I
CC
, SWITCHING (mA)
1.6
1.4
1.2
1.0
−40
I
CC
, DISABLED (mA)
2.0
1.8
1.6
1.4
1.2
1.0
−40
Figure 6. Current Limit vs. Temperature
−15
10
35
60
85
−15
10
35
60
85
T
A
, AMBIENT TEMPERATURE (°C)
T
A
, AMBIENT TEMPERATURE (°C)
Figure 7. Quiescent Current Into V
CC
vs.
Temperature
Figure 8. Quiescent Current Into V
CC
vs.
Temperature
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