HY63V16400 Series
256Kx16bit CMOS Fast SRAM
PRELIMINARY
DESCRIPTION
The HY63V16400 is a 4,194,304-bit high-speed,
SRAM organized as 262,144 words by 16 bits.
The HY63V16400 uses sixteen common input and
output lines and has an output enable pin which
operates faster than address access time at a
read cycle. Also it allows that lower and upper
byte access by data byte control (/UB, /LB). The
device is fabricated using HYUNDAI's advanced
CMOS process and designed for high-speed
circuit technology. It is particularly well suited for
being used in high-density and low power system
applications.
FEATURES
•
•
•
•
Single 3.3V
±
0.3V Power Supply
Fully static operation and Tri-state output
TTL compatible inputs and outputs
Data Byte Control
- LB : I/O1 ~ I/O8, UB : I/O9 ~ I/O16
•
Low data Retention Voltage:
- 2.0V(min)-L-ver.Only
•
Center Power/Ground Pin Configuration
•
Standard pin configuration
- 44pin SOJ/TSOP-II
Product
No.
HY63V16400
HY63V16400
HY63V16400
Supply
Voltage(V)
3.3
3.3
3.3
Speed
(ns)
10
12
15
Operation
Current(mA)
240
230
220
Standby Current(mA)
L
10
10
10
1
1
1
PIN CONNECTION
(Top View)
A0
A1
A2
A3
A4
/CS
I/O1
I/O2
I/O3
I/O4
Vcc
Vss
I/O5
I/O6
I/O7
I/O8
/WE
A5
A6
A7
A8
A9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A17
A16
A15
/OE
/UB
/LB
I/O16
I/O15
I/O14
I/O13
Vss
Vcc
I/O12
I/O11
I/O10
I/O9
NC
A14
A13
A12
A11
A10
A0
BLOCK DIAGRAM
ROW
DECODER
SENSE AMP
I/O1
OUTPUT BUFFER
ADD INPUT BUFFER
DECODER
I/O8
SOJ/
TSOP2
MEMORY ARRAY
512x512x16
WRITE DRIVER
I/O9
I/O16
A17
/CS
/OE
/LB
/UB
/WE
SOJ/TSOP-II
PIN DESCRIPTION
Pin Name
/CS
/WE
/OE
/LB
/UB
Pin Function
Chip Select
Write Enable
Output Enable
Low Byte Control(I/O1~I/O8)
Upper Byte Control(I/O9~I/O16)
Pin Name
I/O1~I/O16
A0~A17
Vcc
Vss
NC
Pin Function
Data Input/Output
Address Input
Power(+3.3V)
Ground
No Connection
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev.01 /Jan. 99
Hyundai Semiconductor
HY63V16400 Series
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
V
IN,
V
OUT
Vcc
T
A
T
STG
P
D
Parameter
Voltage on Any Pin Relative to Vss
Voltage on Vcc Supply Relative to Vss
Commercial
Operating Temperature
Industrial
Storage Temperature
Power Dissipation
Rating
-0.5 to 4.6
-0.5 to 5.5
0 to 70
-40 to 85
-65 to 150
1.0
Unit
V
V
°C
°C
°C
W
Note
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent
damage to the device. This is stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational of this specification is not implied.
Exposure to absolute maximum rating conditions for extended period may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
(T
A
=0°C to 70°C)
Symbol
Vcc
Vss
V
IH
V
IL
Parameter
Supply Voltage
Ground
Input High Voltage
Input Low Voltage
Min.
3.0
0
2.0
-0.3(1)
Type
3.3
0
-
-
Max.
3.6
0
Vcc+0.3(2)
0.8
Unit
V
V
V
V
Note
1. V
IL (min)
= -2.0V a.c(pulse width less than 8ns) for I < 20mA
2. V
IH
(max) = Vcc + 2.0V a.c(pulse width less than 8ns) for I < 20mA
DC ELECTRICAL CHARACTERISTICS
(Vcc = 3.3V±0.3V, T
A
= 0°C to 70°C, unless otherwise specified.)
Symbol
Parameter
Test Conditions
I
LI
Input Leakage Current
V
SS
< V
IN
< V
CC
Output Leakage Current V
SS
< V
OUT
< V
CC
,
I
LO
/CS = V
IH
or
/
OE
=
V
IH
or /WE = V
IL
/CS = V
IL
, V
IN =
V
IH
,
10ns
I
CC
Operating Current
I
I/O
= 0mA
12ns
Min. Duty Cycle = 100%
15ns
TTL Standby Current
/CS = V
IH,
V
IN=
V
IH
or V
IL
Min. Cycle
I
SB
(TTL Inputs)
I
SB1
CMOS Standby Current /CS > V
CC
-0.2V, V
IN
>
(CMOS Inputs)
V
CC
-0.2V or V
IN
< 0.2V
L
V
OL
Output Low Voltage
I
OL
= 8.0mA
V
OH
Output High Voltage
I
OH
= -4.0mA
Note : Typical values are at Vcc = 3.3V, TA = 25°C
Min
-2
-2
-
-
-
-
-
-
-
2.4
Typ
-
-
-
-
-
-
-
-
-
Max
2
2
240
230
220
60
10
1
0.4
-
Unit
uA
uA
mA
mA
mA
mA
mA
mA
V
V
Rev.02 / Jan.99
2
HY63V16400 Series
AC CHARACTERISTICS
(Vcc = 3.3V ± 0.3V, T
A
= 0°C to 70°C, unless otherwise specified.)
-10
Parameter
# Symbol
Min Max
-12
Min Max
12
-
-
-
-
3
0
0
0
0
0
3
12
8
8
0
8
12
0
0
6
0
3
-
12
12
6
6
-
-
-
6
6
6
-
-
-
-
-
-
-
-
6
-
-
-
-15
Unit
Min Max
15
-
-
-
-
3
0
0
0
0
0
3
15
10
10
0
10
15
0
0
7
0
3
-
15
15
7
7
-
-
-
7
7
7
-
-
-
-
-
-
-
-
7
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
READ CYCLE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
tRC
tAA
tACS
tOE
tBA
tCLZ
tOLZ
tBLZ
tCHZ
tOHZ
tBHZ
tOH
tWC
tCW
tAW
tAS
tWP
tWP1
tWR
tWHZ
tDW
tDH
tOW
Read Cycle Time
Address Access Time
Chip Select Access Time
Output Enable to Output Valid
/UB,/LB Access Time
Chip Select to Output in Low Z
Output Enable to Output in Low Z
/UB,/LB Enable to Low-Z Output
Chip Deselecting to Output in High Z
Out Disable to Output in High Z
/UB,/LB Disable to High-Z Output
Output Hold from Address Change
Write Cycle Time
Chip Select to End of Write
Address Valid to End of Write
Address Set-up Time
Write Pulse Width(/OE High)
Write Pulse Width(/OE Low)
Write Recovery Time
Write to Output in High Z
Data to Write Time Overlap
Data Hold from Write Time
Output Active from End of Write
10
-
-
-
-
3
0
0
0
0
0
3
10
7
7
0
7
10
0
0
5
0
3
-
10
10
5
5
-
-
-
5
5
5
-
-
-
-
-
-
-
-
5
-
-
-
WRITE CYCLE
NOTE : Above parameters are also guaranteed at industrial temperature range.
Rev.02 / Jan.99
3
HY63V16400 Series
AC TEST CONDITIONS
(Vcc = 3.3V ± 0.3V, T
A
= 0°C to 70°C, unless otherwise specified.)
Parameter
Value
Input Pulse Level
0V to 3V
Input Rise and Fall Time
3ns
Input and Output Timing Reference Level
1.5V
Output Load
See below
Note : Above parameters are also guaranteed at Industrial temperature range.
AC TEST CONDITIONS
Output Load (A)
Output Load (B)
(for tCHZ, tCLZ, tOHZ, tOLZ, tWHZ & tOW)
+
3.3V
Z
o
=50Ω
Dout
R
L
=50Ω
Dout
353Ω
5pF *
V
L
= 1.5V
Note : *Including jig and scope capacitance
CAPACITANCE
Temp = 25°C, f= 1.0MHz
Symbol
Parameter
CIN
Input Capacitance
C
I/O
Input/Output Capacitance
Condition
V
IN
= 0V
V
I/O
= 0V
Max.
7
8
Unit
pF
pF
Note : This parameter is sampled and not 100% tested
Rev.02 / Jan.99
4
HY63V16400 Series
TIMING DIAGRAM
READ CYCLE 1(Note
1)
tRC
ADDR
tAA
OE
tOE
tOLZ(5)
CS
tACS
tBA
UB,LB
tBLZ(5)
tCLZ
Data
Out
High-Z
tBHZ(5)
Data Valid
tOHZ(5)
tCHZ(5)
tOH
READ CYCLE 2(Note
1,2,4)
tRC
ADDR
tAA
tOH
Data
Out
Previous Data
Data Valid
tOH
READ CYCLE 3(Note
1,3,4)
CS
tACS
tCLZ(5)
Data
Out
Data Valid
tCHZ(5)
Notes:
1. /WE is high for the Read Cycle.
2. Device is continuously selected. /CS = V
IL
3. Address valid is prior to or coincident with /CS transition low
4. /OE = V
IL
5. Transition is measured
±
200mV from steady state voltage.
Rev.02 / Jan.99
5
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