CMLT591E
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SURFACE MOUNT SILICON
PNP TRANSISTOR
DESCRIPTION:
The CENTRAL SEMICONDUCTOR CMLT591E is a
PNP Low VCE(SAT) 1.0 Amp transistor, epoxy molded
in a space saving SOT-563 surface mount package
and designed for applications requiring a high current
capability and low saturation voltages.
MARKING CODE: L59
SOT-563 CASE
MAXIMUM RATINGS:
(TA=25°C)
Collector-Base Voltage
Collector-Emitter Voltage
Emitter-Base Voltage
Continuous Collector Current
Peak Collector Current
Continuous Base Current
Power Dissipation
Operating and Storage Junction Temperature
Thermal Resistance
ELECTRICAL
SYMBOL
ICBO
IEBO
BVCBO
BVCEO
BVEBO
VCE(SAT)
VCE(SAT)
VBE(SAT)
VBE(ON)
hFE
hFE
hFE
hFE
fT
Cob
SYMBOL
VCBO
VCEO
VEBO
IC
ICM
IB
PD
TJ, Tstg
Θ
JA
80
60
5.0
1.0
2.0
200
250
-65 to +150
500
UNITS
V
V
V
A
A
mA
mW
°C
°C/W
CHARACTERISTICS:
(TA=25°C unless otherwise noted)
TEST CONDITIONS
MIN
VCB=60V
VEB=4.0V
IC=100μA
IC=10mA
IE=100μA
IC=500mA, IB=50mA
IC=1.0A, IB=100mA
IC=1.0A, IB=100mA
VCE=5.0V, IC=1.0A
VCE=5.0V, IC=1.0mA
VCE=5.0V,
VCE=5.0V,
VCE=5.0V,
VCE=10V,
VCB=10V,
IC=500mA
IC=1.0A
IC=2.0A
IC=50mA, f=100MHz
IE=0, f=1.0MHz
80
60
5.0
MAX
100
100
UNITS
nA
nA
V
V
V
V
V
V
V
0.20
0.40
1.1
1.0
200
200
50
15
150
10
600
MHz
pF
R4 (12-February 2014)
CMLT591E
SURFACE MOUNT SILICON
PNP TRANSISTOR
SOT-563 CASE - MECHANICAL OUTLINE
PIN CONFIGURATION
LEAD CODE:
1) Collector
2) Collector
3) Base
4) Emitter
5) Collector
6) Collector
Pins 1, 2, 5 and 6 are common.
MARKING CODE: L59
R4 (12-February 2014)
w w w. c e n t r a l s e m i . c o m