Small Outline, 5 Lead, Low
Input Current, High Gain
Optocouplers
Technical Data
HCPL-M700
HCPL-M701
Features
• Surface Mountable
• Very Small, Low Profile
JEDEC Registered
Package Outline
• Compatible with Infrared
Vapor Phase Reflow and
Wave Soldering Processes
• High Current Transfer
Ratio - 2000%
• Low Input Current
Capability - 0.5 mA
• TTL Compatible Output -
V
OL
= 0.1 V
• Guaranteed ac and dc
Performance Over
Temperature: 0
°
C to 70
°
C
• High Output Current -
60 mA
• Recognized under the
Component Program of
U.L. (File No. E55361) for
Dielectric Withstand Proof
Test Voltage of 3750 Vac, 1
Minute
• Lead Free Option “-000E”
Description
These small outline, low input
current, high gain optocouplers
are single channel devices in a
five lead miniature footprint. They
are electrically equivalent to the
following Agilent optocouplers:
SO-5 Package
HCPL-M700
HCPL-M701
Standard DIP
6N138
6N139
SO-8 Package
HCPL-0700
HCPL-0701
The SO-5 JEDEC registered (MO-
155) package outline does not
require “through holes” in a PCB.
This package occupies
approximately one-fourth the
footprint area of the standard
dual-in-line package. The lead
profile is designed to be com-
patible with standard surface
mount processes.
These high gain series opto-
couplers use a Light Emitting
Diode and an integrated high gain
photodetector to provide
extremely high current transfer
ratio between input and output.
Separate pins for the photodiode
and output stage results in TTL
compatible saturation voltages
and high speed operation. Where
desired the V
CC
and V
O
terminals
may be tied together to achieve
conventional photodarlington
operation.
CAUTION: The small device geometries inherent to the design of this bipolar component increase the component’s
susceptibility to damage from electrostatic discharge (ESD). It is advised that normal static precautions be taken
in handling and assembly of this component to prevent damage and/or degradation which may be induced by
ESD.
2
The HCPL-M701 is for use in
CMOS, LSTTL or other low power
applications. A 400% minimum
current transfer ratio is
guaranteed over a 0-70°C
operating range for only 0.5 mA
of LED current.
The HCPL-M700 is designed for
use mainly in TTL applications.
Current Transfer Ratio is 300%
minimum over 0-70°C for an LED
current of 1.6 mA [1 TTL Unit
Load (U.L.)]. A 300% CTR
enables operation with 1 U.L. out
with a 2.2 kΩ pull-up resistor.
Selection for lower input currents
down to 250
µA
is available upon
request.
Applications
• Ground Isolate Most Logic
Families - TTL/TTL, CMOS/
TTL, CMOS/CMOS, LSTTL/
TTL, CMOS/LSTTL
• Low Input Current Line
Receiver
• EIA RS232C Line Receiver
• Telephone Ring Detector
• ac Line Voltage Status
Indicator - Low Input
Power Dissipation
• Low Power Systems -
Ground Isolation
Outline Drawing (JEDEC MO-155)
ANODE 1
4.4 ± 0.1
(0.173 ± 0.004)
6
V
CC
MXXX
XXX
7.0 ± 0.2
(0.276 ± 0.008)
CATHODE 3
5 V
OUT
4
GND
0.4 ± 0.05
(0.016 ± 0.002)
3.6 ± 0.1*
(0.142 ± 0.004)
0.102 ± 0.102
(0.004 ± 0.004)
0.15 ± 0.025
(0.006 ± 0.001)
7° MAX.
1.27 BSC
(0.050)
0.71 MIN.
(0.028)
MAX. LEAD COPLANARITY
= 0.102 (0.004)
DIMENSIONS IN MILLIMETERS (INCHES)
* MAXIMUM MOLD FLASH ON EACH SIDE IS 0.15 mm (0.006)
NOTE: FLOATING LEAD PROTRUSION IS 0.15 mm (6 mils) MAX.
2.5 ± 0.1
(0.098 ± 0.004)
Land Pattern Recommendation
4.4
(0.17)
Schematic
6
V
CC
I
CC
+
I
F
ANODE
1
V
F
CATHODE
–
3
I
O
5
V
O
2.5
(0.10)
1.3
(0.05)
2.0
(0.080)
8.27
(0.325)
0.64
(0.025)
4
GND
3
Absolute Maximum Ratings
(No Derating Required up to 85°C)
Storage Temperature ................................................. -55°C to +125°C
Operating Temperature ............................................... -40°C to +85°C
Average Input Current - I
F
........................................................ 20 mA
Peak Input Current - I
F
.............................................................. 40 mA
(50% duty cycle, 1 ms pulse width)
Peak Transient Input Current - I
F
.............................................. 1.0 A
(≤1
µs
pulse width, 300 pps)
Reverse Input Voltage - V
R
.............................................................. 5 V
Input Power Dissipation ........................................................... 35 mW
Output Current - I
O
(Pin 5) ........................................................ 60 mA
Supply and Output Voltage - V
CC
(Pin 6-4),V
O
(Pin 5-4)
HCPL-M700 ................................................................... -0.5 V to 7 V
HCPL-M701 ................................................................. -0.5 V to 18 V
Output Power Dissipation ....................................................... 100 mW
Infrared and Vapor Phase Reflow Temperature .................. see below
Solder Reflow Thermal Profile
300
PREHEATING RATE 3°C + 1°C/–0.5°C/SEC.
REFLOW HEATING RATE 2.5°C ± 0.5°C/SEC.
PEAK
TEMP.
245°C
PEAK
TEMP.
240°C
PEAK
TEMP.
230°C
2.5°C ± 0.5°C/SEC.
160°C
150°C
140°C
3°C + 1°C/–0.5°C
30
SEC.
30
SEC.
SOLDERING
TIME
200°C
TEMPERATURE (°C)
200
100
PREHEATING TIME
150°C, 90 + 30 SEC.
50 SEC.
TIGHT
TYPICAL
LOOSE
ROOM
TEMPERATURE
0
0
50
100
150
200
250
TIME (SECONDS)
Recommended Pb-Free IR Profile
t
p
T
p
T
L
TEMPERATURE
T
smax
T
smin
t
s
PREHEAT
60 to 180 SEC.
25
t 25 °C to PEAK
TIME
t
L
60 to 150 SEC.
NOTES:
THE TIME FROM 25 °C to PEAK
TEMPERATURE = 8 MINUTES MAX.
T
smax
= 200 °C, T
smin
= 150 °C
260 +0/-5 °C
217 °C
RAMP-UP
3 °C/SEC. MAX.
150 - 200 °C
RAMP-DOWN
6 °C/SEC. MAX.
TIME WITHIN 5 °C of ACTUAL
PEAK TEMPERATURE
20-40 SEC.
Insulation Related Specifications
Parameter
Symbol
Min. External Air Gap
L(IO1)
(Clearance)
Min. External Tracking Path
L(IO2)
(Creepage)
Min. Internal Plastic Gap
(Clearance)
Tracking Resistance
CTI
Isolation Group (per DIN VDE 0109)
Value
≥5
≥5
0.08
175
IIIa
Units
mm
mm
mm
V
Conditions
Measured from input terminals
to output terminals
Measured from input terminals
to output terminals
Through insulation distance
conductor to conductor
DIN IEC 112/VDE 0303 Part 1
Material Group DIN VDE 0109
4
Electrical Specifications
Over recommended temperature (T
A
= 0°C to 70°C) unless otherwise specified. (See note 6.)
Parameter
Current
Transfer
Ratio
Symbol Device Min. Typ.* Max. Units
HCPL-
CTR
M701
400
500
M700
Logic Low
Output
Voltage
V
OL
M701
300
2000
1600
1600
0.1
0.1
0.2
M700
Logic High
Output
I
OH
M701
M700
Logic Low
Supply
Current
Logic High
Supply
Current
Input
Forward
Voltage
Input
Reverse
Breakdown
Voltage
Tempera-
ture Co-
efficient of
Forward
Voltage
Input
Capacitance
Input-
Output
Insulation
Resistance
(Input-
Output)
Capacitance
(Input-
Output)
I
CCL
0.1
0.05
0.1
0.4
3500
2600
2600
0.4
0.4
0.4
0.4
100
250
1.5
mA
µA
V
%
Test Conditions
I
F
= 0.5 mA, V
O
= 0.4 V,
V
CC
= 4.5 V
I
F
= 1.6 mA, V = 0.4 V,
V
CC
= 4.5 V
I
F
= 1.6 mA, V
O
= 0.4 V,
V
CC
= 4.5 V
I
F
= 1.6 mA, I
O
= 8 mA,
V
CC
= 4.5 V
I
F
= 5 mA, I
O
= 15 mA,
V
CC
= 4.5 V
I
F
= 12 mA, I
O
= 24 mA,
V
CC
= 4.5 V
I
F
= 1.6 mA, I
O
= 24 mA,
V
CC
= 4.5 V
I
F
= 0 mA,
V
O
= V
CC
= 18 V
I
F
= 0 mA,
V
O
= V
CC
= 7 V
I
F
= 1.6 mA, V
O
= Open,
V
CC
= 18 V
I
F
= 0 mA, V
O
= Open,
V
CC
= 18 V
T
A
= 25°C
I
F
= 1.6 mA
I
R
= 10
µA
4
1
Fig.
2, 3
Note
1
I
CCH
0.01
10
µA
V
F
1.4
1.7
1.75
V
BV
R
5
∆V
F
/∆T
A
-1.8
mV/°C
I
F
= 1.6 mA
C
IN
V
ISO
3750
60
pF
V
RMS
f = 1 MHz, V
F
= 0
RH
≤
50%, t = 1 min,
T
A
= 25°C
V
I-O
= 500 V
DC
2, 3
R
I-O
10
12
Ω
2
C
I-O
0.6
pF
f = 1 MHz
2
*All typicals at T
A
= 25°C, V
CC
= 5 V.
5
Switching Specifications
Over recommended temperature (T
A
= 0°C to 70°C), V
CC
= 5 V, unless otherwise specified.
Parameter
Propagation
Delay Time
to Logic
Low at
Output
Sym- Device
bol HCPL- Min.
t
PHL
M701
Typ.* Max. Unit
25
75
100
0.5
2
3
M700
5
20
25
Propagation
Delay Time
to Logic
High at
Output
t
PLH
M701
10
60
90
1
10
15
M700
10
35
50
Common
|CM
H
|
Mode
Transient
Immunity at
Logic High
Output
Common
|CM
L
|
Mode
Transient
Immunity at
Logic Low
Output
*All typicals at T
A
= 25°C.
Notes:
1. dc CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current, I
O
, to the forward LED input
current, I
F
, times 100.
2. Device considered a two terminal device: pins 1 and 3 shorted together, and pins 4, 5 and 6 shorted together.
3. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage
≥
4500 V
RMS
for 1 second
(leakage detection current limit, I
I-O
≤
5
µA).
4. Common transient immunity in a Logic High level is the maximum tolerable (positive) dV
CM
/dt on the rising edge of the
common mode pulse, V
CM
, to assure that the output will remain in a Logic High state (i.e., V
O
> 2.0 V). Common mode transient
immunity in a Logic Low level is the maximum tolerable (negative) dV
CM
/dt on the falling edge of the common mode pulse
signal, V
CM
, to assure that the output will remain in a Logic Low state (i.e., V
O
< 0.8 V).
5. In applications where dV/dt may exceed 50,000 V/µs (such as static discharge) a series resistor, R
CC
, should be included to
protect the detector IC from destructively high surge currents. The recommended value is R
CC
= 220
Ω.
6. Use of a 0.1
µF
bypass capacitor connected between pins 4 and 6 is recommended.
Test Conditions
T
A
= 25°C
I
F
= 0.5 mA,
R
L
= 4.7 kΩ
I
F
= 12 mA,
R
L
= 270
Ω
I
F
= 1.6 mA,
R
L
= 2.2 kΩ
I
F
= 0.5 mA,
R
L
= 4.7 kΩ
I
F
= 12 mA,
R
L
= 270
Ω
I
F
= 1.6 mA,
R
L
= 2.2 kΩ
Fig. Note
5, 6,
7
µs
T
A
= 25°C
T
A
= 25°C
T
A
= 25°C
5, 6,
7
T
A
= 25°C
T
A
= 25°C
1,000
10,000
V/µs I
F
= 0 mA
R
L
= 2.2 kΩ
|V
CM
| = 10 V
p-p
8
4, 5
1,000
10,000
V/µs I
F
= 1.6 mA
R
L
= 2.2 kΩ
|V
CM
| = 10 V
p-p
8
4, 5
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
