BR24L08-W/F-W/FJ-W/FV-W/FVM-W
BR24L16-W/F-W/FJ-W/FV-W/FVM-W
Features
• 8k bit serial EEPROM organized as 1k
×
8bit (BR24L08)
16k bit serial EEPROM organized as 2k
×
8bit (BR24L16)
• 2 wire bus serial interface
• Low operating voltage range (2V operating)
Read : 1.8~5.5V
Write : 1.8~5.5V
• Low current consumption
Active : 2mA MAX
Standby : 2 µA MAX
• Clock frequency : 100kHz MAX(1.8~5.5V)
400kHz MAX(2.5~5.5V)
• Write cycle time : 5ms MAX
• Address auto-increment function during read operation
• Automatic erase-before-write function during write operation
• Page write function : 16 byte
• Inadvertent write protection function
Inadvertent write protection at low voltage (Vcc Lock-out function)
WP(Write Protect) function
• Schmitt trigger circuit and noise filter are built into SCL and
SDA pins
• 1,000,000 write cycle typical
• 40 years data retention
• Operating temperature range : -40~85˚C
Pin Configurations
A0 1
A1 2
*1 A2 3
GND 4
8 Vcc
7 WP
6 SCL
5 SDA
DIP8/SOP8/SOP-J8/SSOP-B8/MSOP8
*1: NC (BR24L16)
Pin Functions
Pin
Names
Functions
BR24L08
Not used, Ground
Slave Address Inputs
Ground
Serial Data Input/Output
Serial Data Clock
Write Protect
Power Supply
BR24L16
A0, A1
A2
GND
SDA
SCL
WP
Vcc
Not used
Block Diagram
8~16k bit EEPROM Array
A0
A1
A2
*1
10bit:
BR24L08
11bit:
BR24L16
8bit
10bit:
BR24L08
11bit:
BR24L16
WP
SCL
SDA
Address
Decoder
Slave Words
Address Register
STOP
Data
Register
START
Control Logic
ACK
A0, A1: NC
*1: NC (Only BR24L16)
High Voltage
Generation
Voltage Detection
7
.
1.8V
L
opeow vo
ratin ltag
e
g
1,
Wri 0 0 0 , 0 0
te c 0
ycle
Serial 2 Wire Interface (I
2
C BUS Type)
Timing chart
Byte write cycle
S
T
A
R
T
SLAVE
ADDRESS
1
0 1
*
1
0 A
2
P
1
P
0
R A
/ C
W K
W
R
I
T
E
WA
7
WORD
ADDRESS
WA
0
A
C
K
S
T
O
P
DATA
SDA
LINE
D
7
D
0
A
C
K
Page write cycle
S
T
A
R
T
SLAVE
ADDRESS
1
*
1
0 1 0 A
2
P
1
P
0
R A
/ C
W K
W
R
I
T
E
WA
7
WORD
ADDRESS(n)
WA
0
A
C
K
S
T
O
P
DATA(n)
DATA(n+15)
SDA
LINE
D
7
D
0
A
C
K
D
0
A
C
K
Current read cycle
S
T
A
R
T
SLAVE
ADDRESS
1
*
1
0 1 0 A
2
P
1
P
0
R A
/ C
W K
R
E
A
D
S
T
O
P
DATA
SDA
LINE
D
7
D
0
A
C
K
Random read cycle
S
T
A
R
T
SLAVE
ADDRESS
1
*
1
0 1 0 A
2
P
1
P
0
R A
/ C
W K
W
R
I
T
E
WA
7
WORD
ADDRESS(n)
WA
0
A
C
K
SLAVE
ADDRESS
1
0 1
*
1
0
A
2
P
1
P
0
A
C
K
R
E
A
D
S
T
O
P
DATA(n)
SDA
LINE
D
7
D
0
A
C
K
Sequential read cycle
S
T
A
R
T
SLAVE
ADDRESS
1
0
*
1
1 0 A
2
P
1
P
0
R A
/ C
W K
R
E
A
D
S
T
O
P
DATA(n)
DATA(n+x)
SDA
LINE
D
7
D
0
A
C
K
A
C
K
D
7
D
0
A
C
K
*1: P2 (BR24L16)
Note : BR24C08/F/FJ/FV have no letter "-W", but they are double-cell types.
BR24C16/F/FJ/FV are single-cell types.
Please be careful not to confuse w-cell type and single-cell type. ("-W" means double-cell type.)
8
无线连接
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
