HV9930
HV9930
Initial Release
Hysteretic Boost-Buck (Čuk) LED Driver ICs
Features
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General Description
The HV9930 is a variable frequency PWM controller IC
designed to control an LED lamp driver using a low noise
boost-buck (Cuk) topology. The HV9930 uses hysteretic-
current mode control to regulate both the input and the output
currents. This enables fast transient response (required for
PWM dimming) without the necessity for complex loop
compensation. Input current control enables current limiting
during startup and output overload conditions. Capacitive
isolation protects the LED Lamp from failure of the switching
MOSFET. HV9930 provides a low-frequency PWM dimming
input that can accept an external control signal with a duty ratio
of 0-100%.
The HV9930 based LED driver is ideal for automotive LED
lamps and RGB backlight applications with low voltage DC
inputs. The HV9930 based LED Lamp drivers can achieve
efficiency in excess of 80%.
Constant Output Current
Steps Output Voltage Up or Down
Low EMI
Variable Frequency Operation
Internal 8 to 200V Linear Regulator
Input and output current sensing
Input Current limit
Enable & PWM Dimming
Applications
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Automotive LED Drivers
RGB backlight applications
Battery Powered LED Lamps
Other Low Voltage AC/DC or DC/DC LED Drivers
Typical Application Circuit
D2
L1
C1
L2
-
VDC
Rcs1
Rd
Cd
Q1
D1
Rcs2
D3
VO
+
Rs1
HV9930
V
IN
GATE
CS1
Rref1
GND
V
DD
PWMD
CS2
REF
Rs2a
C2
Rs2b
Rref2
C3
NR062005
Supertex inc.
·
1235 Bordeaux Drive, Sunnyvale, CA 94089
·
Tel: (408) 222-8888
·
FAX: (408) 222-4895
·
www.supertex.com
NR062005
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HV9930
Ordering Information
Package Options
Device
8 pin SOIC
8 pin DIP
HV9930
HV9930LG
HV9930P
Absolute Maximum Ratings
V
IN
to GND………………………………. -0.5V to +200V
-0.3V to +13.5V
V
DD
to GND……………………………..
CS1, CS2 to GND……………………….. -0.3V to V
DD
+ 0.3V
PWMD to GND…………………………… -0.3V to (V
DD
+ 0.3V)
GATE to GND…………………………….. 0.3V to (V
DD
+ 0.3V)
Continuous Power Dissipation (TA = +25°C) (Note 1)
8-Pin DIP (derate 9mW/°C above +25°C)….....…. 900mW
8-Pin SO (derate 6.3mW/°C above 25°C)……….. 630mW
Operating Temperature Range ...............….-40°C to +85°C
Junction Temperature..................................+125°C
Storage Temperature Range .......................-65°C to +150°C
Stresses beyond those listed under ‘‘Absolute Maximum Ratings’’ may cause
permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond
those indicated in the operational sections of the specifications is not
implied. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
Electrical Characteristics
Symbol
Input
V
INDC
I
INsd
Description
(The * denotes the specifications which apply over the full operating junction temperature range of 0
°
C < T
A
< +85
°
C, otherwise the specifications are
at T
A
= 25
°
C, V
DD
= 7.5V, unless otherwise noted)
Min
8
Typ
Max
200
Units
V
mA
Conditions
DC input voltage
PWM_D connected to GND,
V
IN
= 12V
Input DC supply voltage range*
Shut-Down mode supply current*
0.5
1
Internal Regulator
V
DD
I
DD(ext)
UVLO
∆UVLO
V
DD(ext)
Reference
V
REF
REF pin voltage*
1.212
1.25
1.288
V
REF bypassed with a 0.1µF capacitor
to GND; I
REF
= 0;
V
DD
= 7.5V; PWMD = 5V
V
REFLINE
Line regulation of reference voltage
Reference Output current range
1
Load regulation of reference
voltage
0
20
mV
REF bypassed with a 0.1µF capacitor
to GND; I
REF
= 0;
V
DD
= 7 – 12V; PWMD = 5V
I
REF
-0.01
1.0
mA
REF bypassed with a 0.1µF capacitor
to GND; V
DD
= 7 – 12V; PWMD = 5V
REF bypassed with a 0.1µF capacitor
to GND; I
REF
= 0 – 1mA;
V
DD
= 7.5; PWMD = 5V
Internally regulated voltage
V
DD
current available for external
circuitry
1
V
DD
under voltage lockout
threshold
V
DD
under voltage lockout
hysteresis
Steady State external voltage
which can applied at the V
DD
pin
6.45
6.7
500
12
7.0
7.5
9.0
1.0
6.95
V
mA
V
mV
V
V
IN
= 8–200V, I
DD(ext)
= 0,
GATE open
V
IN
= 8–200V
V
IN
rising
V
REFLOAD
0
25
mV
PWM Dimming
V
PWMD(lo)
V
PWMD(hi)
R
PWMD
PWMD input low voltage*
PWMD input high voltage*
PWMD pull-down resistance
2.4
50
100
2
0.8
150
V
V
kΩ
V
IN
= 10 - 200V
V
IN
= 10 - 200V
V
PWMD
= 5V
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HV9930
Gate
I
SOURCE
I
SINK
T
RISE
T
FALL
GATE short circuit current, sourcing
GATE sinking current
GATE output rise time
GATE output fall time
0.165
0.165
30
30
50
50
A
A
ns
ns
V
GATE
= 0V; V
DD
= 7.5V
V
GATE
= 10V ; V
DD
= 7.5V
C
GATE
= 500pF; V
DD
= 7.5V
C
GATE
= 500pF; V
DD
= 7.5 V
Input Current Sense Comparator
V
TURNON1
V
TURNOFF1
T
D1, ON
T
D1, OFF
Voltage required to turn GATE on
*
Voltage required to turn GATE off
*
Delay to Output (turn-on)
Delay to Output (turn-on)
90
-10
100
0
150
150
110
10
250
250
mV
mV
ns
ns
CS2 = 200mV ; CS1 increasing ;
GATE goes LOW to HIGH
CS2 = 200mV ; CS1 decreasing ;
GATE goes HIGH to LOW
CS2=200mV ;
CS1 = 50mV to 200mV step
CS2=200mV ;
CS1 = 50mV to –100mV step
Output Current Sense Comparator
V
TURNON2
V
TURNOFF2
T
D2, ON
T
D2, OFF
1
Voltage required to turn GATE on
*
Voltage required to turn GATE off
*
Delay to Output (turn-on)
Delay to Output (turn-on)
90
-10
100
0
150
150
110
10
250
250
mV
mV
ns
ns
CS1 = 200mV ; CS2 increasing ;
GATE goes LOW to HIGH
CS1 = 200mV ; CS2 decreasing ;
GATE goes HIGH to LOW
CS1=200mV ;
CS2 = 50mV to 200mV step
CS1=200mV ;
CS2 = 50mV to –100mV step
Also limited by package power dissipation limit, whichever is lower.
Pinout
Pin Description
V
IN
–
This pin is the input of a 8-200V voltage regulator.
V
DD
–
This is a power supply pin for all internal circuits. It
must be bypassed with a low ESR capacitor to GND.
GATE –
This pin is the output gate driver for an external N-
channel power MOSFET.
GND –
Ground return for all the internal circuitry. This pin
must be electrically connected to the ground of the power
train.
REF
– This pin provides accurate reference voltage. It must
be bypassed with a 0.01-0.1uF capacitor to GND.
PWM –
When this pin is pulled to GND, switching of the
HV9930 is disabled. When the PWM pin is released, or
external TTL high level is applied to it, switching will
resume. This feature is provided for applications that require
PWM dimming of the LED lamp.
CS1 and CS2 –
These pins are used to sense the input and
output currents of the boost-buck converter. They are the
non-inverting inputs of the internal comparators.
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HV9930
Functional Description
Power Topology
The HV9930 is optimized to drive a continuous conduction
mode (CCM) boost-buck DC/DC converter topology commonly
referred to as “Čuk converter” (see Circuit Diagram on page 1).
This power converter topology offers numerous advantages
useful for driving high-brightness light emitting diodes (HB
LED). These advantages include step-up or step-down voltage
conversion ratio and low input and output current ripple. The
input and the output inductors can also share a common core.
The output load is decoupled from the input voltage with a
capacitor making the driver inherently failure-safe for the
output load.
The HV9930 offers a simple and effective control technique for
use with a boost-buck LED driver. It uses two hysteretic mode
controllers – one for the input and one for the output. The
outputs of these two hysteretic comparators are AND together,
and used to drive the external FET. This control scheme gives
accurate current control and constant output current in the
presence of input voltage transients without the need for
complicated loop design.
The input side hysteretic controller is in operation only during
start-up and overload conditions. This ensures that the input
current never exceeds the designed value. During normal
operation, the input current will be less than the programmed
current and hence, the output of the input side comparator will
be HIGH. The output of the AND gate will then be dictated by
the output current controller.
The output side hysteretic comparator will be in operation
during the steady state operation of the circuit.
This
comparator turns the MOSFET on and off based on the LED
current.
The use of these comparators in a boost-buck topology is a
patent-pending technique, which eliminates the need for
compensation components.
PWM Dimming
PWM Dimming can be achieved by applying a TTL-compatible
square wave signal at the PWM pin. When the PWMD pin is
pulled high, the gate driver is enabled and the circuit operates
normally. When the PWMD pin is left open or connected to
GND, the gate driver is disabled and the external MOSFET
turns off. The IC is designed so that the signal at the PWMD
pin inhibits the driver only and the IC need not go through the
entire start-up cycle each time ensuring a quick response time
for the output current.
The flying capacitor in the Cuk converter (C1) is initially
charged to the input Voltage VDC (through diodes D1 and D2).
When the circuit is turned on and reaches steady state, the
voltage across C1 will be VDC+VO. In the absence of diode
D2, when the circuit is turned off, capacitor C1 will discharge
through the LEDs and the input voltage source VDC. Thus,
during PWM dimming, if capacitor C1 has to charged and
discharged each cycle, the transient response of the circuit will
be limited. By adding diode D2, the voltage across capacitor
C1 is held at VDC+VO even when the circuit is turned off
enabling the circuit to return quickly to its steady state (and
bypassing the start-up stage) upon being enabled.
Input Voltage Regulator
The HV9930 can be powered directly from its V
IN
pin that takes
a voltage from 8V to 200V. When a voltage is applied at the
V
IN
pin, the HV9930 tries to maintain a constant 7.5V (typ) at
the V
DD
pin. The regulator also has a built in under-voltage
lockout which shuts off the IC if the voltage at the V
DD
pin falls
below the UVLO threshold.
The V
DD
pin must be bypassed by a low ESR capacitor
(≥0.1µF) to provide a low impedance path for the high
frequency current of the output gate driver.
The IC can also be operated by supplying a voltage at the V
DD
pin greater than the internally regulated voltage. This will turn
off the internal linear regulator and the IC will function by
drawing power from the external voltage source connected to
the V
DD
pin.
In case of input transients that reduce the input voltage below
8V (like cold crank condition in an automotive system), the V
IN
pin of the HV9930 can be connected to the drain of the
MOSFET through a diode. Since the drain of the FET is at a
voltage equal to the sum of the input and output voltages, the
IC will still be operational when the input goes below 8V. In
these cases, a larger capacitor is needed to the V
DD
pin to
supply power to the IC when the MOSFET is ON.
Application Information
Over-voltage Protection
Over-voltage protection can be added by splitting the output
side resistor Rs2 into two components and adding a zener
diode D3. When there is an open LED condition, the diode D3
will clamp the output voltage and the zener diode current will
be regulated by the sum of Rs2a and Rcs2.
Reference
An internally trimmed voltage reference of 1.25V (+/- 3%) is
provided at the REF pin. The reference can supply a
maximum output current of 1mA to drive external circuitry.
This reference can be used to set the current thresholds of the
two comparators as shown in the Typical Application Circuit.
Damping Circuit
The Cuk converter is inherently unstable when the output
current is being controlled. An uncontrolled input current will
lead to an un-damped oscillation between L1 and C1 causing
excessively high voltages across C1. To prevent these
oscillations, a damping circuit consisting of Rd and Cd is
applied across the capacitor C1. This damping circuit will help
to stabilize the circuit and help in the proper operation of the
HV9930 based Cuk converter.
Current Comparators
The HV9930 features two identical comparators with a built-in
100mV hysteresis. When the GATE is low, the inverting
terminal is connected to 100mV and when the GATE is high, it
is connected to GND. One comparator is used for the input
current control and the other for the output current control.
Design and Operation of the Boost-Buck Converter
For details on the design for a Boost-Buck converter using the
HV9930 and the calculation of the damping components,
please refer to Application Note AN-H51.
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NR062005
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