CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. The collector of each transistor of the CA3083 is isolated from the substrate by an integral diode. The substrate must be connected to a voltage
which is more negative than any collector voltage in order to maintain isolation between transistors and provide normal transistor action. To avoid
undesired coupling between transistors, the substrate Terminal (5) should be maintained at either DC or signal (AC) ground. A suitable bypass
capacitor can be used to establish a signal ground.
2.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
PARAMETER
FOR EACH TRANSISTOR
For Equipment Design, T
A
= 25
o
C
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Collector-to-Base Breakdown Voltage
Collector-to-Emitter Breakdown Voltage
Collector-to-Substrate Breakdown Voltage
Emitter-to-Base Breakdown Voltage
Collector-Cutoff-Current
Collector-Cutoff-Current
DC Forward-Current Transfer Ratio (Note 3) (Figure 1)
V
(BR)CBO
V
(BR)CEO
V
(BR)CIO
V
(BR)EBO
I
CEO
I
CBO
h
FE
I
C
= 100µA, I
E
= 0
I
C
= 1mA, I
B
= 0
I
CI
= 100µA, I
B
= 0, I
E
= 0
I
E
= 500µA, I
C
= 0
V
CE
= 10V, I
B
= 0
V
CB
= 10V, I
E
= 0
V
CE
= 3V
I
C
= 10mA
I
C
= 50mA
20
15
20
5
-
-
40
40
0.65
-
-
60
24
60
6.9
-
-
76
75
0.74
0.40
450
-
-
-
-
10
1
-
-
0.85
0.70
-
V
V
V
V
µA
µA
Base-to-Emitter Voltage (Figure 2)
Collector-to-Emitter Saturation Voltage (Figures 3, 4)
Gain Bandwidth Product
V
BE
V
CE SAT
f
T
V
CE
= 3V, I
C
= 10mA
I
C
= 50mA, I
B
= 5mA
V
CE
= 3V, I
C
= 10mA
V
V
MHz
FOR TRANSISTORS Q
1
AND Q
2
(As a Differential Amplifier)
Absolute Input Offset Voltage (Figure 6)
Absolute Input Offset Current (Figure 7)
NOTE:
3. Actual forcing current is via the emitter for this test.
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