PLD08 DC-DC Series Data Sheet
Non-Isolated Converters
Features
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•
•
•
•
•
•
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RoHS lead solder exemption compliant
Surface-mount configuration
Low-profile 7.4 mm package
Independently regulated outputs
Efficiencies above 90%
8 A of combined output current at
65ºC/200 LFM
Flexible output load distribution
Output short circuit protection
Remote On/Off
Trimmable output voltages
Applications
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•
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Distributed power architectures
Telecommunications equipment
LAN/WAN
Data processing
Description
The PLD08 Series converters are surface-mount, non-isolated, and have dual outputs. The products provide
point-of-load conversion of a single 3.3 V or 5 V input voltage into two independently-regulated low output
voltages. Each output can provide up to 5 A of current (8 A total), has independent feedback loop, and
independent trim function. Two power trains operate out-of-phase, thus significantly reducing input ripple current
and simplifying external filtering. High efficiency, low space requirements, and flexible loading characteristics make
the converters an ideal choice for powering multi-voltage ASICs.
Model Selection
Model
Input
Voltage
VDC
3.15-3.6
4.5 - 5.5
4.5 - 5.5
4.5 - 5.5
Output
Voltage
Vout1, VDC
2.5
3.3
2.5
1.8
Output
Voltage
Vout2, VDC
1.8
2.5
1.8
1.5
Output Rated
Current
I1/I2
rated,
ADC (Note 1)
5/5
5/5
5/5
5/5
Output
Ripple/Noise,
mV pk-pk
20/50
20/50
20/50
20/50
Typical
Efficiency @
I
rated,
%
91
92
91
89
PLD08UDB
PLD08VED
PLD08VDB
PLD08VBA
Model numbers highlighted in yellow or shaded are not recommended for new designs.
NOTES
1. Current range of each output is 0.2~5 A, but combined output current must not be greater than 8 A (Iout1+Iout2 < 8A).
JUN 04, 2004 revised to APR 11, 2006
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PLD08 DC-DC Series Data Sheet
Non-Isolated Converters
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings may cause performance degradation, adversely effect long-
term reliability, and cause permanent damage to the converter.
Parameter
Input voltage
Operating Temperature
Storage Temperature
Inhibit Control Voltage
Conditions/Description
PLD08UDB
PLD08Vxx
200 LFM Airflow, Full Load
Referenced to GND: PLD08UDB
Referenced to GND: PLD08Vxx
Min
3.15
4.5
-25
-40
Max
3.6
5.5
+65
+125
3.6
5.5
Units
VDC
VDC
°C
°C
VDC
VDC
Environmental and Mechanical Specifications
All specifications apply over specified input voltage, output load, and temperature range, unless otherwise noted.
Parameter
Operating Temperature Range
Storage Temperature Range
Operating Humidity
Storage Humidity
Shock
Sinusoidal Vibration
Temperature Coefficient
Altitude
Conditions/Description
Min
-25
-40
(Non-Condensing)
(Non-Condensing)
Halfsine wave (6ms), 3 axes
Bellcore GR-63-Core,
Section 5.4.3
Nom
Max
65
+125
95
95
50
1
0.01
10,000
Units
°C
°C
%
%
g
g
%/°C
ft.
Input Specifications
All specifications apply over specified input voltage, output load, and temperature range, unless otherwise noted.
Parameter
Input Voltage
(Note 2)
Inrush Transient
External Capacitor (Required)
Conditions/Description
PLD08Uxx (Note 3)
PLD08Vxx
Vin = Vin.max, Io1 = Io2 =4 A
ESR < 0.1 Ohm
Min
3.0
4.5
100
Nom
3.3
5.0
0.04
Max
3.6
5.5
Units
VDC
VDC
A
2
s
µF
NOTES:
2.
PLD08 is not internally fused. Use of an external fuse is recommended.
3.
For outputs at 2.5 V, minimum input voltage is 3.15 V.
JUN 04, 2004 revised to APR 11, 2006
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PLD08 DC-DC Series Data Sheet
Non-Isolated Converters
Output Specifications
All specifications apply at 25
°C,
unless otherwise noted.
Parameter
Output Voltage Setpoint Accuracy
Output Current Range (Note 4)
Line Regulation
Load Regulation
Total Output Voltage Regulation
Dynamic Regulation:
Peak Deviation
Settling Time
Load Capacitance (Required)
Output Short-Circuit Protection
(Note 5)
Temperature Coefficient
Output Ripple and Noise
Trim Range (Note 6)
Conditions/Description
Vin nom, 50% Load
Individual Output
Total Combined Current
Vin.Min to Vin.Max,
@I
out
Max
At Vin.nom, Iout 0.2 to 5 A
Over all input voltage, load, and
temperature conditions
25% load step change
with other output at 4 A
To 1% error band
Each output, ESR < 0.1 Ohm
Vin Nom, Iout Max
Vout
≤
0.1V
Vin Nom, Iout Max
Vin Nom, Iout Max
90
100
Min
-1.5
0.2
0.4
Nom
Max
1.5
5
8
0.2
12
3.0
Units
%Vout
ADC
ADC
%Vout
mV
%Vout
±20
30
±50
200
1,000
mV p-p
μs
μF
5.2
10
30
11.6
0.01
20
50
110
A
%/°C
mV rms
mV p-p
%Vout
Feature Specifications
All specifications apply over specified input voltage, output load, and temperature range, unless otherwise noted.
Parameter
Inhibit
Turn-On Time
Switching Frequency
Thermal Shutdown
Conditions/Description
Inhibit signal low — OFF
Inhibit signal high or floating — ON
To Output Regulation Band;
(100% Resistive Load)
N/A
Min
0
Vin
min
Nom
Max
0.4
Vin
max
40
Units
VDC
ms
kHz
°C
25
550
General Specifications
All specifications apply over specified input voltage, output load, and temperature range, unless otherwise noted.
Parameter
Calculated MTBF
Load Capacitance
Water Washing
NOTES:
4.
Minimum load is required for proper operation.
5.
PLD08 is not internally fused. Use of an external fuse is recommended.
6.
Max is 105% for the PLD08UDB 2.5 V output.
Conditions/Description
(Bellcore TR-NWT-000332)
Min
100
Nom
5.4
Yes
Max
Units
MHrs
µF
JUN 04, 2004 revised to APR 11, 2006
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PLD08 DC-DC Series Data Sheet
Non-Isolated Converters
95
EFFICIENCY %
Characteristic Curves
95
90
EFFICIENCY %
85
80
75
70
65
60
10
20
30
40
50 60 70
LOAD %
80
90 100
EFF.(4.5V)
EFF.(5V)
EFF.(5.5V)
90
85
80
75
70
65
60
10
20
30
40 50 60
LOAD %
70
EFF.(4.5V)
EFF.(5V)
EFF.(5.5V)
80
90 100
Figure 4. PLD08VBA Efficiency vs. Output Load
Typical Application
Figure 5 shows the recommended connections for
the PLD08 Series converter.
Figure 1. PLD08VED Efficiency vs. Output Load
95
90
EFFICIENCY %
85
80
75
70
65
60
10
20
30
40
50 60
LOAD %
70
EFF.(4.5V)
EFF.(5V)
EFF.(5.5V)
80
90 100
Figure 5. Typical Application of PLD08 Series
C1
2
F
6
V
in
Inhibit
ON/OFF
V
out1
V
out2
4
8
C2
C3
7
5
GND
Figure 2. PLD08VDB Efficiency vs. Output Load
95
90
EFFICIENCY %
85
80
75
70
65
60
10
20
30
40
50
60
70
80
90 100
EFF.(3.15V)
EFF.(3.3V)
EFF.(3.6V)
The PLD Series converters require external input
and output capacitors for proper operation. A
minimum of a 100
μF
capacitor with an ESR <0.1Ω
is required at the input and at each of the outputs of
the PLD08 Series. Each output has a minimum
current requirement.
For output decoupling, it is recommended using
small ceramic capacitors connected directly across
the output pins of the converter. These bypass
capacitors are to be applied in addition to the
capacitance described above.
Inhibit Feature
The Inhibit pin of the PLD08 converter, functions as
a normal soft shutdown, referenced to the GND pin
(see Figure 5). When the Inhibit pin is pulled low to
within 0.4 V of ground, the outputs are turned off
and the unit goes into low input power mode.
When the pin is left floating or pulled high to Vin,
the unit is on and operates normally.
LOAD %
Figure 3. PLD08UDB Efficiency vs. Output Load
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PLD08 DC-DC Series Data Sheet
Non-Isolated Converters
An open collector switch is recommended to control the
voltage between the Inhibit pin and the GND pin of the
converter. The Inhibit pin is pulled up internally, so no
external voltage source is required. Avoid connecting a
resistor between the Inhibit pin and the +Vin pin.
When the Inhibit pin is used to achieve remote control,
the user must take care that the control signal must is
not referenced ahead of EMI filtering, or remotely from
the unit. Optical couplers placed directly at the module
will solve any ground reference problems.
Output Voltage Trim
The trim feature allows the user to adjust each of the output
voltages +10% from the nominal setting. This function can be
used for voltage margining, compensation for distribution
losses, or other requirements when the output voltage needs
to be adjusted.
V
out1
R
TRIM 1
V
out2
down
1
R
TRIM 2
GND
down
2
Figure 7. PLD08 Series Trim-Down Schematic
NOTES:
1.
2.
When the output voltage is trimmed up, the output power
from the converter must not exceed its maximum rating.
In order to avoid creating apparent load regulation
degradation, it is important that the trim resistors are
connected directly to the Vout and output GND pins, and
not to the load or to traces going to the load.
The Trim Function
The trim mechanism for the PLD08 Series trims up with
a resistor from the TRIM pin to the GND pin and trims
down with a resistor from the TRIM pin to the respective
+Vout pin. See Figures 6 and 7.
The general equation for trimming the output voltage on
either output of the PLD08 Series is shown below:
Safety Considerations
The PLD08 Series converters do not provide
isolation from input to output. Relevant isolation
requirements according to all IEC60950 based
standards must be provided by the input devices to
the PLD08 Series module. Nevertheless, if the
system using the converter needs to receive safety
agency approval, certain rules must be followed in
the design of the system. In particular, all of the
creepage and clearance requirements of the end-
use safety requirements must be observed. These
documents include UL60950 - CSA60950-00 and
EN60950, although specific applications may have
other or additional requirements.
The PLD08 Series converters have no internal fuse.
An external fuse must be provided to protect the
system in the event of failure. A fuse with a rating
not greater than 7 A, 125 V is recommended. The
user can select a lower rating fuse based upon the
inrush transient and the maximum input current of
the converter, which occurs at the minimum input
voltage. Both input traces and the chassis ground
trace (if applicable) must be capable of conducting
a current of 1.5 times the value of the fuse without
opening. The fuse must not be placed in the
grounded input line.
In order for the output of the PLD08 Series
converter to be considered as SELV (Safety Extra
Low Voltage), according to all IEC60950 based
standards, the input to the module needs to be
R
TrimUP
=
4.99 * 0.8
−
1
kOhm
Vadj
−
Vout
(
Vadj
−
0.8) * 4.99
−
1
Vout
−
Vadj
R
TrimDOWN
=
kOhm
V
out1
TRIM 1
R
up
1
V
out2
TRIM 2
R
up
2
GND
Figure 6. PLD08 Series Trim-Up Schematic
JUN 04, 2004 revised to APR 11, 2006
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