Philips Semiconductors
Product specification
Digital video encoder
1
FEATURES
SAA7120H; SAA7121H
•
Monolithic CMOS 3.3 V device
•
Digital PAL/NTSC encoder
•
System pixel frequency 13.5 MHz
•
Accepts MPEG decoded data on 8-bit wide input port;
input data format C
B
-Y-C
R
(CCIR 656)
•
Three Digital-to-Analog Converters (DACs) for Y, C
and CVBS two times oversampled with 10-bit resolution
•
Real-time control of subcarrier
•
Cross-colour reduction filter
•
Closed captioning encoding and World Standard
Teletext (WST) and North-American Broadcast Text
System (NABTS) teletext encoding including sequencer
and filter
•
Line 23 Wide Screen Signalling (WSS) encoding
•
Fast I
2
C-bus control port (400 kHz)
•
Encoder can be master or slave
•
Programmable horizontal and vertical input
synchronization phase
•
Programmable horizontal sync output phase
•
Internal Colour Bar Generator (CBG)
•
2
×
2 bytes in lines 20 (NTSC) for copy guard
management system can be loaded via I
2
C-bus
•
Down mode of DACs
•
Controlled rise/fall times of synchronization and
blanking output signals
•
Macrovision™
(1)
Pay-per-View copy protection system
rev. 7.01 and rev. 6.1 as option; this applies to
SAA7120H only. The device is protected by USA patent
numbers 4631603, 4577216 and 4819098 and other
intellectual property rights. Use of the Macrovision
anti-copy process in the device is licensed for
non-commercial home use only. Reverse engineering or
disassembly is prohibited. Please contact your nearest
Philips Semiconductors sales office for more information
•
QFP44 package.
2
GENERAL DESCRIPTION
The SAA7120H; SAA7121H encodes digital YUV video
data to an NTSC or PAL CVBS or S-video signal.
The circuit accepts CCIR compatible YUV data with
720 active pixels per line in 4 : 2 : 2 multiplexed formats,
for example MPEG decoded data. It includes a sync/clock
generator and on-chip DACs.
(1) Macrovision™ is a trademark of the Macrovision Corporation.
3
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
SAA7120H
SAA7121H
QFP44
DESCRIPTION
plastic quad flat package; 44 leads (lead length 1.3 mm);
body 10
×
10
×
1.75 mm
VERSION
SOT307-2
2002 Oct 11
3
Philips Semiconductors
Product specification
Digital video encoder
6
PINNING
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
TYPE
−
I
I
I
supply
supply
I/O
I/O
I
I
I
I
I
I
I
I
supply
supply
I
digital supply voltage 2
digital ground 2
reserved
SAA7120H; SAA7121H
SYMBOL
RES
SP
AP
LLC
V
SSD1
V
DDD1
RCV1
RCV2
MP7
MP6
MP5
MP4
MP3
MP2
MP1
MP0
V
DDD2
V
SSD2
RTCI
DESCRIPTION
test pin; connected to digital ground for normal operation
test pin; connected to digital ground for normal operation
line-locked clock; this is the 27 MHz master clock for the encoder
digital ground 1
digital supply voltage 1
raster control 1 for video port; this pin receives/provides a VS/FS/FSEQ signal
raster control 2 for video port; this pin provides an HS pulse of programmable
length or receives an HS pulse
MPEG ports; inputs for
“CCIR 656”
style multiplexed C
B
-Y-C
R
data
real-time control input; if the LLC clock is provided by an SAA7111 or SAA7151B,
RTCI should be connected to the RTCO pin of the respective decoder to improve
the signal quality
reserved
the I
2
C-bus slave address select input pin; LOW: slave address = 88H,
HIGH = 8CH
reserved
reserved
analog output of the chrominance signal
analog supply voltage 1 for the C DAC
reserved
analog output of VBS signal
analog supply voltage 2 for the Y DAC
reserved
analog output of the CVBS signal
analog supply voltage 3 for the CVBS DAC
analog ground 1 for the DACs
analog ground 2 for the oscillator and reference voltage
crystal oscillator output
crystal oscillator input; if the oscillator is not used, this pin should be connected to
ground
analog supply voltage 4 for the oscillator and reference voltage
5
RES
SA
RES
RES
C
V
DDA1
RES
Y
V
DDA2
RES
CVBS
V
DDA3
V
SSA1
V
SSA2
XTALO
XTALI
V
DDA4
2002 Oct 11
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
−
I
−
−
O
supply
−
O
supply
−
O
supply
supply
supply
O
I
supply
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