Philips Semiconductors
Product specification
Thyristors
logic level
GENERAL DESCRIPTION
Passivated, sensitive gate thyristor in
a plastic envelope, suitable for
surface mounting, intended for use in
general purpose switching and
phase control applications. These
devices are intended to be interfaced
directly to microcontrollers, logic
integrated circuits and other low
power gate trigger circuits.
BT258S-800R
QUICK REFERENCE DATA
SYMBOL
V
DRM
, V
RRM
I
T(AV)
I
T(RMS)
I
TSM
PARAMETER
Repetitive peak off-state voltages
Average on-state current
RMS on-state current
Non-repetitive peak on-state current
MAX. UNIT
800
5
8
75
V
A
A
A
PINNING - SOT428
PIN
NUMBER
1
2
3
tab
cathode
anode
gate
anode
PIN CONFIGURATION
tab
SYMBOL
a
k
2
1
3
g
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134).
SYMBOL
PARAMETER
CONDITIONS
MIN.
-
half sine wave; T
mb
≤
111 ˚C
all conduction angles
half sine wave; T
j
= 25 ˚C prior to
surge
t = 10 ms
t = 8.3 ms
t = 10 ms
I
TM
= 10 A; I
G
= 50 mA;
dI
G
/dt = 50 mA/µs
-
-
-
-
-
-
-
-
-
-
-40
-
MAX.
800
5
8
75
82
28
50
2
5
5
0.5
150
125
1
UNIT
V
A
A
A
A
A
2
s
A/µs
A
V
W
W
˚C
˚C
V
DRM
, V
RRM
Repetitive peak off-state
voltages
I
T(AV)
I
T(RMS)
I
TSM
Average on-state current
RMS on-state current
Non-repetitive peak
on-state current
I
2
t
dI
T
/dt
I
GM
V
RGM
P
GM
P
G(AV)
T
stg
T
j
I
2
t for fusing
Repetitive rate of rise of
on-state current after
triggering
Peak gate current
Peak reverse gate voltage
Peak gate power
Average gate power
over any 20 ms period
Storage temperature
Operating junction
temperature
1
Note: Operation above 110˚C may require the use of a gate to cathode resistor of 1kΩ or less.
October 2002
1
Rev 2.000
Philips Semiconductors
Product specification
Thyristors
logic level
THERMAL RESISTANCES
SYMBOL
R
th j-mb
R
th j-a
PARAMETER
CONDITIONS
MIN.
-
-
BT258S-800R
TYP.
-
75
MAX.
2.0
-
UNIT
K/W
K/W
Thermal resistance
junction to mounting base
Thermal resistance
pcb (FR4) mounted; footprint as in Fig.14
junction to ambient
STATIC CHARACTERISTICS
T
j
= 25 ˚C unless otherwise stated
SYMBOL
I
GT
I
L
I
H
V
T
V
GT
I
D
, I
R
PARAMETER
Gate trigger current
Latching current
Holding current
On-state voltage
Gate trigger voltage
Off-state leakage current
CONDITIONS
V
D
= 12 V; I
T
= 0.1 A
V
D
= 12 V; I
GT
= 0.1 A
V
D
= 12 V; I
GT
= 0.1 A
I
T
= 16 A
V
D
= 12 V; I
T
= 0.1 A
V
D
= V
DRM(max)
; I
T
= 0.1 A; T
j
= 110 ˚C
V
D
= V
DRM(max)
; V
R
= V
RRM(max)
; T
j
= 125 ˚C
MIN.
-
-
-
-
-
0.1
-
TYP.
50
0.4
0.3
1.3
0.4
0.2
0.1
MAX.
200
10
6
1.6
1.5
-
0.5
UNIT
µA
mA
mA
V
V
V
mA
DYNAMIC CHARACTERISTICS
T
j
= 25 ˚C unless otherwise stated
SYMBOL
dV
D
/dt
t
gt
t
q
PARAMETER
Critical rate of rise of
off-state voltage
Gate controlled turn-on
time
Circuit commutated
turn-off time
CONDITIONS
V
DM
= 67% V
DRM(max)
; T
j
= 125 ˚C;
exponential waveform; R
GK
= 100
Ω
I
TM
= 10 A; V
D
= V
DRM(max)
; I
G
= 5 mA;
dI
G
/dt = 0.2 A/µs
V
D
= 67% V
DRM(max)
; T
j
= 125 ˚C;
I
TM
= 12 A; V
R
= 24 V; dI
TM
/dt = 10 A/µs;
dV
D
/dt = 2 V/µs; R
GK
= 1 kΩ
MIN.
50
-
-
TYP.
100
2
100
MAX.
-
-
-
UNIT
V/µs
µs
µs
October 2002
2
Rev 2.000
Philips Semiconductors
Product specification
Thyristors
logic level
BT258S-800R
Ptot (W)
8
conduction
angle
degrees
30
60
90
120
180
form
factor
(a)
6
4
2.8
2.2
1.9
1.57
1.9
2.2
2.8
4
Tmb(max) (˚C)
109
a = 1.57
111
113
115
117
119
80
70
60
50
40
30
20
10
0
ITSM / A
IT
I TSM
time
T
Tj initial = 25 C max
4
2
121
123
0
0
2
4
IT(AV) (A)
6
125
1
10
100
Number of half cycles at 50Hz
1000
Fig.1. Maximum on-state dissipation, P
tot
, versus
average on-state current, I
T(AV)
, where
a = form factor = I
T(RMS)
/ I
T(AV)
.
ITSM / A
Fig.4. Maximum permissible non-repetitive peak
on-state current I
TSM
, versus number of cycles, for
sinusoidal currents, f = 50 Hz.
1000
24
20
16
IT(RMS) / A
dI
T
/dt limit
100
I TSM
T
time
12
IT
8
4
0
0.01
Tj initial = 25 C max
10
10us
100us
T/s
1ms
10ms
0.1
1
surge duration / s
10
Fig.2. Maximum permissible non-repetitive peak
on-state current I
TSM
, versus pulse width t
p
, for
sinusoidal currents, t
p
≤
10ms.
IT(RMS) / A
BT258
111 C
Fig.5. Maximum permissible repetitive rms on-state
current I
T(RMS)
, versus surge duration, for sinusoidal
currents, f = 50 Hz; T
mb
≤
111˚C.
VGT(Tj)
VGT(25 C)
9
8
7
6
5
4
3
2
1
1.6
1.4
1.2
1
0.8
0.6
0
-50
0
50
Tmb / C
100
150
0.4
-50
0
50
Tj / C
100
150
Fig.3. Maximum permissible rms current I
T(RMS)
,
versus mounting base temperature T
mb
.
Fig.6. Normalised gate trigger voltage
V
GT
(T
j
)/ V
GT
(25˚C), versus junction temperature T
j
.
October 2002
3
Rev 2.000
Philips Semiconductors
Product specification
Thyristors
logic level
BT258S-800R
3
2.5
2
1.5
1
0.5
IGT(Tj)
IGT(25 C)
I /A
30 T
Tj = 125
°C
Tj = 25
°C
20
typ
10
Vo = 1 V
Rs = 0.04
Ω
max
0
-50
0
0
50
Tj / C
100
150
0
0.5
1
VT / V
1.5
2
Fig.7. Normalised gate trigger current
I
GT
(T
j
)/ I
GT
(25˚C), versus junction temperature T
j
.
IL(Tj)
IL(25 C)
Fig.10. Typical and maximum on-state characteristic.
3
2.5
BT150
10
Zth j-mb (K/W)
1
2
1.5
1
0.5
0
-50
0.01
10us
0.1ms
1ms
10ms
tp / s
0.1s
1s
0.1
P
D
tp
t
0
50
Tj / C
100
150
10s
Fig.8. Normalised latching current I
L
(T
j
)/ I
L
(25˚C),
versus junction temperature T
j
.
IH(Tj)
IH(25 C)
Fig.11. Transient thermal impedance Z
th j-mb
, versus
pulse width t
p
.
dVD/dt (V/us)
1000
3
2.5
2
1.5
1
0.5
RGK = 100 ohms
100
10
0
-50
0
50
Tj / C
100
150
1
0
50
Tj / C
100
150
Fig.9. Normalised holding current I
H
(T
j
)/ I
H
(25˚C),
versus junction temperature T
j
.
Fig.12. Typical, critical rate of rise of off-state voltage,
dV
D
/dt versus junction temperature T
j
.
October 2002
4
Rev 2.000
Philips Semiconductors
Product specification
Thyristors
logic level
MECHANICAL DATA
Dimensions in mm
Net Mass: 1.1 g
6.73 max
1.1
2.38 max
0.93 max
seating plane
BT258S-800R
5.4
tab
4 min
6.22 max
10.4 max
4.6
2
1
2.285 (x2)
0.5 min
0.5
0.3
0.5
3
0.8 max
(x2)
Fig.13. SOT428 : centre pin connected to tab.
MOUNTING INSTRUCTIONS
Dimensions in mm
7.0
7.0
2.15
2.5
1.5
4.57
Fig.14. SOT428 : minimum pad sizes for surface mounting.
Notes
1. Plastic meets UL94 V0 at 1/8".
October 2002
5
Rev 2.000
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