P-Channel Enhancement Mode Field Effect Transistor
General Description
These P-Channel enhancement mode field effect
transistors are produced using
ON Semiconductor’s
proprietary, high cell density, DMOS technology. This
very high density process has been designed to
minimize on-state resistance, provide rugged
and reliable performance and fast switching. They
can be used, with a minimum of effort, in most
applications requiring up to 180mA DC and can deliver
current up to 1A.
This product is particularly suited to low voltage
applications requiring a low current high side switch.
Features
• −0.18A, −60V.
R
DS(ON)
= 5
Ω
@ V
GS
=
−10
V
•
Voltage controlled p-channel small signal switch
•
High density cell design for low R
DS(ON)
•
High saturation current
D
D
S
SOT-23
G
T
A
=25
o
C unless otherwise noted
G
S
Absolute Maximum Ratings
Symbol
V
DSS
V
GSS
I
D
P
D
T
J
, T
STG
T
L
Drain-Source Voltage
Gate-Source Voltage
Drain Current
– Continuous
– Pulsed
Maximum Power Dissipation
Derate Above 25°C
Parameter
Ratings
−60
±20
(Note 1)
Units
V
V
A
W
mW/°C
°C
°C
−0.18
−1
0.36
2.9
−55
to +150
300
(Note 1)
Operating and Storage Junction Temperature Range
Maximum Lead Temperature for Soldering
Purposes, 1/16” from Case for 10 Seconds
Thermal Characteristics
R
θJA
Thermal Resistance, Junction-to-Ambient
(Note 1)
350
°C/W
Package Marking and Ordering Information
Device Marking
65D
Device
NDS0605
Reel Size
7’’
Tape width
8mm
Quantity
3000 units
2002
Semiconductor Components Industries, LLC.
September-2017,
Rev.
2
Publication Order Number:
NDS0605/D
NDS0605
Electrical Characteristics
Symbol
BV
DSS
∆BV
DSS
∆T
J
I
DSS
I
GSS
V
GS(th)
∆V
GS(th)
∆T
J
R
DS(on)
T
A
= 25°C unless otherwise noted
Parameter
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage.
(Note 2)
Test Conditions
I
D
= –10
µA
V
GS
= 0 V,
I
D
= –10
µA,Referenced
to 25°C
V
DS
= –48 V,
V
GS
=
±20
V,
V
DS
= V
GS
,
V
GS
= 0 V
V
DS
= 0 V
I
D
= –250 µA
Min Typ Max
–60
–53
–1
–500
±100
–1
–1.7
3
1.0
1.3
1.7
–0.6
0.07
0.43
–3
Units
V
mV/°C
µA
µA
nA
Off Characteristics
V
DS
= –48 V,V
GS
= 0 V T
J
= 125°C
On Characteristics
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
On–State Drain Current
Forward Transconductance
V
mV/°C
I
D
= –250 µA,Referenced to 25°C
V
GS
= –10 V, I
D
= –0.5 A
V
GS
= –4.5 V, I
D
= –0.25 A
V
GS
= –10 V,I
D
= –0.5 A,T
J
=125°C
V
GS
= –10 V, V
DS
= – 10 V
V
DS
= –10V,
I
D
= – 0.2 A
5.0
7.5
10
Ω
I
D(on)
g
FS
C
iss
C
oss
C
rss
R
G
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
A
S
Dynamic Characteristics
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
(Note 2)
V
DS
= –25 V,
f = 1.0 MHz
V
GS
= 0 V,
79
10
4
10
pF
pF
pF
Ω
5
12.6
20
15
2.5
ns
ns
ns
ns
nC
nC
nC
–
0.18
–1.5
V
GS
= –15 mV, f = 1.0 MHz
Switching Characteristics
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
V
DD
= –25 V,
V
GS
= –10 V,
I
D
= – 0.2 A,
R
GEN
= 6
Ω
2.5
6.3
10
7.5
V
DS
= –48 V,
V
GS
= –10 V
I
D
= –0.5 A,
1.8
0.3
0.4
Drain–Source Diode Characteristics and Maximum Ratings
I
S
V
SD
t
rr
Q
rr
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
Voltage
Diode Reverse Recovery Time
Diode Reverse Recovery Charge
V
GS
= 0 V,
I
S
= –0.5 A
(Note 2)
–0.8
17
(Note 2)
A
V
nS
nC
I
F
= –0.5A
d
iF
/d
t
= 100 A/µs
15
Notes:
1.
R
θJA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
θJC
is guaranteed by design while R
θCA
is determined by the user's board design.
a) 350°C/W when mounted on a
minimum pad..
Scale 1 : 1 on letter size paper
2.
Pulse Test: Pulse Width
≤
300
µs,
Duty Cycle
≤
2.0%
www.onsemi.com
2
NDS0605
Typical Characteristics
1.4
1.2
-I
D
, DRAIN CURRENT (A)
1
0.8
0.6
0.4
0.2
0
0
V
GS
=-10V
-6.0V
-4.5V
2.2
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
-4.0V
2
V
GS
=-3.0V
1.8
1.6
-3.5V
1.4
1.2
1
0.8
-4.0V
-4.5V
-6.0V
-10V
-3.5V
-3.0V
-2.5V
1
2
3
4
5
6
0
0.2
0.4
0.6
0.8
1
1.2
1.4
-V
DS
, DRAIN TO SOURCE VOLTAGE (V)
-I
D
, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
5
1.8
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
R
DS(ON)
, ON-RESISTANCE (OHM)
1.6
1.4
1.2
1
0.8
0.6
0.4
-50
I
D
= -0.5A
V
GS
= -10V
I
D
= -0.25A
4
3
T
A
= 125
o
C
2
1
T
A
= 25
o
C
0
2
4
6
8
10
-V
GS
, GATE TO SOURCE VOLTAGE (V)
-25
0
25
50
75
100
125
150
T
J
, JUNCTION TEMPERATURE (
o
C)
Figure 3. On-Resistance Variation with
Temperature.
1.2
1
-I
D
, DRAIN CURRENT (A)
0.8
0.6
0.4
0.2
0
1
1.5
2
2.5
3
3.5
4
4.5
-V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
10
-I
S
, REVERSE DRAIN CURRENT (A)
V
DS
= -10V
T
A
= -55
o
C
125
o
C
25 C
o
V
GS
= 0V
1
T
A
= 125
o
C
0.1
25
o
C
0.01
-55
o
C
0.001
0.0001
0.2
0.4
0.6
0.8
1
1.2
-V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
www.onsemi.com
3
NDS0605
Typical Characteristics
10
-V
GS
, GATE-SOURCE VOLTAGE (V)
I
D
= -0.5A
8
-48V
6
V
DS
= -12V
-24V
100
C
ISS
f = 1 MHz
V
GS
= 0 V
80
CAPACITANCE (pF)
60
4
40
C
OSS
2
20
C
RSS
0
0
0.4
0.8
1.2
1.6
2
Q
g
, GATE CHARGE (nC)
0
0
10
20
30
40
50
60
-V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
10
P(pk), PEAK TRANSIENT POWER (W)
5
Figure 8. Capacitance Characteristics.
-I
D
, DRAIN CURRENT (A)
1
R
DS(ON)
LIMIT
1ms
10ms
100ms
1s
V
GS
= -10V
SINGLE PULSE
R
θ
JA
= 350
o
C/W
T
A
= 25
o
C
10s
DC
100us
4
SINGLE PULSE
R
θ
JA
= 350°C/W
T
A
= 25°C
3
0.1
2
0.01
1
0.001
1
10
-V
DS
, DRAIN-SOURCE VOLTAGE (V)
100
0
0.01
0.1
1
t
1
, TIME (sec)
10
100
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
1
D = 0.5
0.2
R
θJA
(t) = r(t) * R
θJA
R
θJA
= 350 C/W
P(pk)
t
1
t
2
T
J
- T
A
= P * R
θJA
(t)
Duty Cycle, D = t
1
/ t
2
o
0.1
0.1
0.05
0.02
0.01
0.01
SINGLE PULSE
0.001
0.0001
0.001
0.01
0.1
t
1
, TIME (sec)
1
10
100
1000
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1a.
Transient thermal response will change depending on the circuit board design.
www.onsemi.com
4
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at
www.onsemi.com/site/pdf/Patent−Marking.pdf.
ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA
Phone:
303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax:
303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email:
orderlit@onsemi.com
N. American Technical Support:
800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
ON Semiconductor Website: www.onsemi.com
Order Literature:
http://www.onsemi.com/orderlit
For additional information, please contact your local
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
