27C256
256K (32K x 8) CMOS EPROM
FEATURES
• High speed performance
- 90 ns access time available
• CMOS Technology for low power consumption
- 20 mA Active current
- 100
µ
A Standby current
• Factory programming available
• Auto-insertion-compatible plastic packages
• Auto ID aids automated programming
• Separate chip enable and output enable controls
• High speed “express” programming algorithm
• Organized 32K x 8: JEDEC standard pinouts
- 28-pin Dual-in-line package
- 32-pin PLCC Package
- 28-pin SOIC package
- 28-pin Thin Small Outline Package (TSOP)
- 28-pin Very Small Outline Package (VSOP)
- Tape and reel
• Data Retention > 200 years
• Available for the following temperature ranges:
- Commercial:
0˚C to +70˚C
- Industrial:
-40˚C to +85˚C
- Automotive:
-40˚C to +125˚C
PACKAGE TYPES
TSOP
OE
A11
A9
A8
A13
A14
V
CC
V
PP
A12
A7
A6
A5
A4
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A10
CE
D7
D6
D5
D4
D3
V
SS
D2
D1
D0
A0
A1
A2
27C256
PLCC
4
3
2
1
32
31
30
A7
A12
V
PP
NU
Vcc
A14
A13
A6
A5
A4
A3
A2
A1
A0
NC
O0
5
6
7
29
28
27
8
9
10
11
12
13
14
15
16
26
25
24
23
22
21
A8
A9
A11
NC
OE
A10
CE
O7
O6
17
18
19
DIP/SOIC
V
PP
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
V
SS
O1
O2
V
SS
NU
O3
O4
O5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
DESCRIPTION
The Microchip Technology Inc. 27C256 is a CMOS
256K bit electrically Programmable Read Only Memory
(EPROM). The device is organized as 32K words by 8
bits (32K bytes). Accessing individual bytes from an
address transition or from power-up (chip enable pin
going low) is accomplished in less than 90 ns. This very
high speed device allows the most sophisticated micro-
processors to run at full speed without the need for
WAIT states. CMOS design and processing enables
this part to be used in systems where reduced power
consumption and reliability are requirements.
A complete family of packages is offered to provide the
most flexibility in applications. For surface mount appli-
cations, PLCC, SOIC, VSOP or TSOP packaging is
available. Tape and reel packaging is also available for
PLCC or SOIC packages.
28
27
26
25
24
23
22
21
20
19
18
17
16
15
20
27C256
27C256
V
CC
A14
A13
A8
A9
A11
OE
A10
CE
O7
O6
O5
O4
O3
VSOP
OE
A11
A9
A8
A13
A14
V
CC
V
PP
A12
A7
A6
A5
A4
A3
22
23
24
25
26
27
28
1
2
3
4
5
6
7
21
20
19
18
17
16
15
14
13
12
11
10
9
8
A10
CE
O7
O6
O5
O4
O3
V
SS
O2
O1
O0
A0
A1
A2
27C256
©
1996 Microchip Technology Inc.
DS11001L-page 1
This document was created with FrameMaker 4 0 4
27C256
1.0
1.1
ELECTRICAL CHARACTERISTICS
Maximum Ratings*
TABLE 1-1:
Name
A0-A14
CE
OE
V
PP
O0 - O7
V
CC
V
SS
NC
NU
PIN FUNCTION TABLE
Function
Address Inputs
Chip Enable
Output Enable
Programming Voltage
Data Output
+5V Power Supply
Ground
No Connection; No Internal Connec-
tion
Not Used; No External Connection Is
Allowed
V
CC
and input voltages w.r.t. V
SS
........ -0.6V to +7.25V
V
PP
voltage w.r.t. V
SS
during
programming ....................................... -0.6V to +14.0V
Voltage on A9 w.r.t. V
SS
...................... -0.6V to +13.5V
Output voltage w.r.t. V
SS
............... -0.6V to V
CC
+1.0V
Storage temperature .......................... -65˚C to +150˚C
Ambient temp. with power applied ..... -65˚C to +125˚C
*Notice: Stresses above those listed under “Maximum Ratings”
may cause permanent damage to the device. This is a stress rat-
ing only and functional operation of the device at those or any
other conditions above those indicated in the operation listings of
this specification is not implied. Exposure to maximum rating con-
ditions for extended periods may affect device reliability.
TABLE 1-2:
READ OPERATION DC CHARACTERISTICS
V
CC
= +5V (
±
10%)
Commercial:
Industrial:
Extended (Automotive):
Tamb = 0˚C to +70˚C
Tamb = -40˚C to +85˚C
Tamb = -40
°
C to +125
°
C
Conditions
Parameter
Input Voltages
Input Leakage
Output Voltages
Output Leakage
Input Capacitance
Output Capacitance
Power Supply Current,
Active
Part*
all
all
all
all
all
all
C
I,E
Status
Logic "1"
Logic "0"
—
Logic "1"
Logic "0"
—
—
—
TTL input
TTL input
Symbol
V
IH
V
IL
I
LI
V
OH
V
OL
I
LO
C
IN
C
OUT
I
CC1
I
CC2
Min.
2.0
-0.5
-10
2.4
Max.
V
CC
+1
0.8
10
0.45
Units
V
V
µ
A
V
V
µ
A
pF
pF
mA
mA
V
IN
= 0 to V
CC
I
OH
= -400
µ
A
I
OL
= 2.1 mA
V
OUT
= 0V to V
CC
V
IN
= 0V; Tamb = 25
°
C;
f = 1 MHz
V
OUT
= 0V; Tamb = 25
°
C;
f = 1 MHz
V
CC
= 5.5V; V
PP
= V
CC
f = 1 MHz;
OE = CE = V
IL
;
I
OUT
= 0 mA;
V
IL
= -0.1 to 0.8V;
V
IH
= 2.0 to V
CC
;
Note 1
-10
—
—
—
—
10
6
12
20
25
Power Supply Current,
Standby
I
PP
Read Current
V
PP
Read Voltage
C
I, E
all
all
all
TTL input
TTL input
CMOS input
Read Mode
Read Mode
I
CC
(
S
)
—
2
3
100
100
V
CC
mA
mA
µ
A
µ
A
V
CE = V
CC
±
0.2V
V
PP
= 5.5V
I
PP
V
PP
V
CC
-0.7
* Parts: C=Commercial Temperature Range; I, E=Industrial and Extended Temperature Ranges
Note 1: Typical active current increases .75 mA per MHz up to operating frequency for all temperature ranges.
DS11001L-page 2
©
1996 Microchip Technology Inc.
27C256
TABLE 1-3:
READ OPERATION AC CHARACTERISTICS
AC Testing Waveform:
Output Load:
Input Rise and Fall Times:
Ambient Temperature:
V
IH
= 2.4V and V
IL
= 0.45V; V
OH
= 2.0V V
OL
= 0.8V
1 TTL Load + 100 pF
10 ns
Commercial:
Tamb = 0˚C to +70˚C
Industrial:
Tamb = -40˚C to +85˚C
Automotive:
Tamb = -40
°
C to +125
°
C
Units Conditions
Min
Address to Output
Delay
CE to Output Delay
OE to Output Delay
CE or OE to O/P
High Impedance
Output Hold from
Address CE or OE,
whichever goes first
t
ACC
t
CE
t
OE
t
OFF
t
OH
—
—
—
0
0
Max
90
90
40
30
—
Min
—
—
—
0
0
Max
100
100
45
30
—
Min
—
—
—
0
0
Max
120
120
55
35
—
Min
—
—
—
0
0
Max Min
150
150
65
50
—
—
—
—
0
0
Max
200
200
75
55
—
ns
ns
ns
ns
ns
CE=OE =V
IL
OE = V
IL
CE = V
IL
27C256-90* 27C256-10* 27C256-12 27C256-15 27C256-20
Parameter
Sym
* -10, -90 AC Testing Waveform: V
IH
= 2.4V and V
IL
= .45V; V
OH
= 1.5V and V
OL
= 1.5V
Output Load: 1 TTL Load + 30pF
FIGURE 1-1:
V
IH
Address
V
IL
V
IH
CE
V
IL
READ WAVEFORMS
Address Valid
t
CE(2)
V
IH
OE
V
IL
V
OH
V
OL
t
ACC
t
OE(2)
High Z
t
OFF(1,3)
t
OH
Valid Output
High Z
Outputs
O0 - O7
Notes: (1) t
OFF
is specified for OE or CE, whichever occurs first
(2) OE may be delayed up to t
CE
- t
OE
after the falling edge of CE without impact on t
CE
(3) This parameter is sampled and is not 100% tested.
©
1996 Microchip Technology Inc.
DS11001L-page 3
27C256
TABLE 1-4:
PROGRAMMING DC CHARACTERISTICS
Ambient Temperature: Tamb = 25
°
C
±
5
°
C
V
CC
= 6.5V
±
0.25V, V
PP
= V
H
= 13.0V
±
0.25V
Parameter
Input Voltages
Input Leakage
Output Voltages
V
CC
Current, program & verify
V
PP
Current, program
A9 Product Identification
Status
Logic”1”
Logic”0”
—
Logic”1”
Logic”0”
—
—
—
Symbol
V
IH
V
IL
I
LI
V
OH
V
OL
I
CC2
I
PP2
V
H
Min
2.0
-0.1
-10
2.4
0.45
—
—
11.5
20
25
12.5
Max.
V
CC
+1
0.8
10
Units
V
V
µ
A
V
V
mA
mA
V
V
IN
= 0V to V
CC
I
OH
= -400
µ
A
I
OL
= 2.1 mA
Note 1
Note 1
Conditions
Note 1: V
CC
must be applied simultaneously or before V
PP
and removed simultaneously or after V
PP
TABLE 1-5:
PROGRAMMING AC CHARACTERISTICS
AC Testing Waveform: V
IH
=2.4V and V
IL
=0.45V; V
OH
=2.0V; V
OL
=0.8V
Output Load:
1 TTL Load + 100pF
Ambient Temperature: Tamb=25°C
±
5°C
V
CC
= 6.5V
±
0.25V, V
PP
= V
H
= 13.0V
±
0.25V
Symbol
t
AS
t
DS
t
DH
t
AH
t
DF
t
VCS
t
PW
t
CES
t
OES
t
VPS
t
OE
Min.
2
2
2
0
0
2
95
2
2
2
—
Max.
—
—
—
—
130
—
105
—
—
—
100
Units
µs
µs
µs
µs
ns
µs
µs
µs
µs
µs
ns
100
µs
typical
Remarks
for Program, Program Verify
and Program Inhibit Modes
Parameter
Address Set-Up Time
Data Set-Up Time
Data Hold Time
Address Hold Time
Float Delay (2)
V
CC
Set-Up Time
Program Pulse Width (1)
CE Set-Up Time
OE Set-Up Time
V
PP
Set-Up Time
Data Valid from OE
Note 1: For express algorithm, initial programming width tolerance is 100
µs ±5%.
2: This parameter is only sampled and not 100% tested. Output float is defined as the point where data is no
longer driven (see timing diagram).
DS11001L-page 4
©
1996 Microchip Technology Inc.
27C256
FIGURE 1-2:
PROGRAMMING WAVEFORMS
Program
V
IH
Address
V
IL
t
AS
V
IH
Data
V
IL
t
DS
13.0V(2)
V
PP
5.0V
6.5V(2)
V
CC
5.0V
V
IH
CE
V
IL
V
IH
OE
V
IL
t
PW
t
OES
t
OE
(1)
t
VCS
t
VPS
Data Stable
t
DH
High Z
Address Stable
Verify
t
AH
Data Out Valid
t
DF
(1)
Notes:
(1) t
DF
and t
OE
are characteristics of the device but must be accommodated by the programmer
(2) V
CC
= 6.5 V
±0.25V,
V
PP
= V
H
= 13.0V
±0.25V
for express algorithm
TABLE 1-6:
MODES
CE
V
IL
V
IL
V
IH
V
IH
V
IH
V
IL
V
IL
OE
V
IL
V
IH
V
IL
V
IH
X
V
IH
V
IL
V
PP
V
CC
V
H
V
H
V
H
V
CC
V
CC
V
CC
A9
X
X
X
X
X
X
V
H
O0 - O7
D
OUT
D
IN
D
OUT
High Z
High Z
High Z
Identity Code
Operation Mode
Read
Program
Program Verify
Program Inhibit
Standby
Output Disable
Identity
X = Don’t Care
1.2
Read Mode
(See Timing Diagrams and AC Characteristics)
Read Mode is accessed when:
a)
b)
the CE pin is low to power up (enable) the chip
the OE pin is low to gate the data to the output
pins
For Read operations, if the addresses are stable, the
address access time (t
ACC
) is equal to the delay from
CE to output (t
CE
). Data is transferred to the output
after a delay from the falling edge of OE (t
OE
).
©
1996 Microchip Technology Inc.
DS11001L-page 5
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