D ts e t
aa h e
R c e t r lc r nc
o h se Ee to is
Ma u a t r dCo o e t
n fc u e
mp n n s
R c e tr b a d d c mp n ns ae
o h se rn e
o oet r
ma ua trd u ig ete dewaes
n fcue sn i r i/ fr
h
p rh s d f m te oiia s p l r
uc a e r
o h r n l u pi s
g
e
o R c e tr waes rce td f m
r o h se
fr e rae r
o
te oiia I. Al rce t n ae
h
r nl P
g
l e rai s r
o
d n wi tea p o a o teOC
o e t h p rv l f h
h
M.
P r aetse u igoiia fcoy
at r e td sn r n la tr
s
g
ts p o rmso R c e tr e eo e
e t rga
r o h se d v lp d
ts s lt n t g aa te p o u t
e t oui s o u rne
o
rd c
me t o e c e teOC d t s e t
es r x e d h
M aa h e.
Qu l yOv riw
ai
t
e ve
• IO- 0 1
S 90
•A 92 cr ct n
S 1 0 et ai
i
o
• Qu l e Ma ua trr Ls (
ai d
n fcues it QML MI- R -
) LP F
385
53
•C a sQ Mitr
ls
lay
i
•C a sVS a eL v l
ls
p c ee
• Qu l e S p l r Ls o D sr uos( L )
ai d u pi s it f it b tr QS D
e
i
•R c e trsacic l u pir oD A a d
o h se i
r ia s p l t L n
t
e
me t aln u t a dD A sa d r s
es lid sr n L tn ad .
y
R c e tr lcrnc , L i c mmi e t
o h se Ee t is L C s o
o
tdo
t
s p ligp o u t ta s t f c so r x e t-
u pyn rd cs h t ai y u tme e p ca
s
t n fr u lya daee u loto eoiial
i s o q ai n r q a t h s r n l
o
t
g
y
s p l db id sr ma ua trr.
u pi
e yn ut
y n fcues
T eoiia ma ua trr d ts e t c o a yn ti d c me t e e t tep r r n e
h r n l n fcue’ aa h e a c mp n ig hs o u n r cs h ef ma c
g
s
o
a ds e ic t n o teR c e tr n fcue v rino ti d vc . o h se Ee t n
n p c ai s f h o h se ma ua trd eso f hs e ie R c e tr lcr -
o
o
isg aa te tep r r n eo i s mio d co p o u t t teoiia OE s e ic -
c u rne s h ef ma c ft e c n u tr rd cs o h r n l M p c a
o
s
g
t n .T pc lv le aefr eee c p r o e o l. eti mii m o ma i m rt g
i s ‘y ia’ au s r o rfrn e up s s ny C r n nmu
o
a
r xmu ai s
n
ma b b s do p o u t h rceiain d sg , i lt n o s mpetsig
y e a e n rd c c aa tr t , e in smuai , r a l e t .
z o
o
n
© 2 1 R cetr l t n s LC Al i t R sre 0 1 2 1
0 3 ohs E cr i , L . lRg s eevd 7 1 0 3
e e oc
h
T l r m r, l s v iw wrcl . m
o e n oe p ae it w . e c o
a
e
s
o ec
NCP1510
Advance Information
PWM Buck Converter with a
Very Low Iq During Low
Load Conditions
The NCP1510 is a tri−mode regulator that operates either as a
Synchronized PWM Buck Converter, PWM Buck Converter with
internal oscillator or as a Pulsed Switching Regulator. If a
synchronization signal is present, the NCP1510 operates as a current
mode PWM converter with synchronous rectification. The optional
external frequency input signal allows the user to control the location
of the spurious frequency noise generated by a PWM converter. The
Pulsed Switching Regulator mode is active when the Sync Pin is
Low. The Pulsed Mode is an extremely low quiescent current Buck
Converter. NCP1510 operates in a PWM mode with an internal
oscillator when the Sync Pin is held high. The NCP1510
configuration allows the flexibility of efficient high power operation
and low input current during system sleep modes.
Features
http://onsemi.com
MARKING
DIAGRAM
1
9 PIN
MICRO BUMP
FC SUFFIX
CASE 499AC
DAK
YYWW
1
DAK = Device Code
YY = Year
WW = Work Week
•
Synchronous Rectification for Higher Efficiency in PWM Mode
•
Pulsed Switching Mode Operation for Low Current Consumption at
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Low Loads
Output Current of 300 mA in PWM and 30 mA in Pulse Mode
Integrated MOSFETs and Feedback Circuits
Cycle−by−Cycle Current Limit
Automatic Switching Between PWM, with External or Internal
Oscillator, and Pulsed Mode
Operating Frequency Range of 450 to 1000 kHz
Internal 1.0 MHz Oscillator
Thermal Limit Protection
Built−in Slope Compensation for Current Mode PWM Converter
1.05, 1.35, 1.57, 1.8 Fixed Output Voltages
Shutdown Current Consumption of 0.2
mA
Pb−Free Package for Green Manufacturing
Cellular Phones and Pagers
PDA
Digital Cameras
Supplies for DSP Cores
Portable Applications
A1
PIN CONNECTIONS
Pin: A1. − GNDP
A2. − LX
A3. − VCC
B1. − SYNC
B2. − GNDA
B3. − FB
C1. − SHD
C2. − CB1
C3. − CB0
B1
C1
A2
B2
C2
A3
B3
C3
(Bottom View)
ORDERING INFORMATION
Device
Package
Shipping{
Applications
NCP1510FCT1G 9 Pin Pb−Free 3000 Tape & Reel
Micro Bump
G Suffix parts indicate a Pb−Free package and
requires use with a Pb−Free assembly process.
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
This document contains information on a new product. Specifications and information
herein are subject to change without notice.
©
Semiconductor Components Industries, LLC, 2003
1
November, 2003 − Rev. 8
Publication Order Number:
NCP1510/D
NCP1510
Shutdown
Sync
NCP1510
CB0
CB1
V
bat
V
out
L 6.8
mH
C
out
10
m
C
in
10
m
Figure 1. Applications Circuit
V
CC
V
in
Q1
LX
L
FB
V
out
C
in
Low Iq
Pulsed
Cntrl
C
out
PWM/
PFM
Cntrl
Q2
Control
GNDP
Sync CB0 CB1 SHD
GNDA
Figure 2. Block Diagram
Bill of Materials
Component
C
L
Value
10
mF,
X5R, 6.3 V
6.8
mH
Manufacturer
TDK
muRata
TDK
Coilcraft
Coilcraft
Sumida
Part Number
C2012X5R0J106
GRM21BR60J106
LLF4017−6R8
0805PS−682
LPO4812
CLS4D11
Size (mm)
2.0x1.25x1.25
4.1x4.0x1.7
3.4x3.0x1.8
4.8x4.8x1.2
4.9x4.9x1.2
I
out
(mA)
−
700
200
350
600
ESL (mW)
−
146
970
230
220
*Output current calculated from VCC = 4.2 Vmax, 1.5 Vout and Freq = 800 kHz (1.0 MHz − 20 %).
http://onsemi.com
2
NCP1510
PIN FUNCTION DESCRIPTION
Pin No.
A1
A2
A3
B1
Symbol
GNDP
LX
VCC
SYNC
Type
Power Ground
Analog Output
Analog Input
Analog Input
Description
Ground Connection for the NFET Power Stage.
Connection from Power Pass Elements to the Inductor.
Power Supply Input for Power and Analog V
CC
.
Synchronization input for the PWM converter. If a clock signal is present, the
converter uses the rising edge for the turn on. If this pin is low, the converter is in
the Pulsed mode. If this pin is high, the converter uses the internal oscillator for the
PWM mode. This pin contains an internal pull down resistor.
Ground connection for the Analog Section of the IC. This is the GND for the FB,
Ref, Sync, CB, and SHD pins.
Feedback Voltage from the Output of the Power Supply.
Enable for Switching Regulator. This Pin is Active High to enable the NCP1510. The
SDN Pin has an internal pull down resistor to force the converter off if this pin is not
connected to the external circuit.
Selects V
out
. This pin contains an internal pull up resistor.
Selects V
out
. This pin contains an internal pull down resistor.
B2
B3
C1
GNDA
FB
SHD
Analog Ground
Analog Input
Analog Input
C2
C3
CB1
CB0
Analog Input
Analog Input
MAXIMUM RATINGS
(Note 1)
Rating
Maximum Voltage All Pins
Maximum Operating Voltage All Pins
Thermal Resistance, Junction−to−Air
Operating Ambient Temperature Range
ESD Withstand Voltage
Moisture Sensitivity
Storage Temperature Range
Junction Operating Temperature
1. This device series contains ESD protection and exceeds the following tests:
Human Body Model 2,500 V per MIL−STD−883, Method 3015.
Machine Model Method 150 V.
Human Body Model (Note 1)
Machine Model (Note 1)
Symbol
V
max
V
max
Rja
T
A
V
ESD
MSL
T
stg
T
J
Value
5.5
5.2
159
−30 to 85
> 2500
> 150
Level 1
−55 to 150
−30 to 125
°C
°C
Unit
V
V
°C/W
°C
V
http://onsemi.com
3
NCP1510
ELECTRICAL CHARACTERISTICS
(V
in
= 3.6 V, Vo = 1.57 V, T
A
= 25°C, Fsyn = 600 kHz 50% Duty Cycle square wave for PWM
mode; T
A
= –30 to 85°C for Min/Max values, unless otherwise noted.
Characteristic
VCC Pin
Quiescent Current of Sync Mode, I
out
= 0 mA
Quiescent Current of PWM Mode, I
out
= 0 mA
Quiescent Current of Pulsed Mode, I
out
= 0 mA
Quiescent Current, SHD Low
Input Voltage Range
Sync Pin
Input Voltage
Frequency Operational Range
Minimum Synchronization Pulse Width
Maximum Synchronization Pulse Width
SYNC “H” Voltage Threshold
SYNC “L” Voltage Threshold
SYNC “H” Input Current, Vsync = 3.6 V
SYNC “L” Input Current, Vsync = 0 V
Output Level Selection Pins
Input Voltage
CB0, CB1 “H” Voltage Threshold
CB0, CB1 “L” Voltage Threshold
CB0 “H” Input Current, CB = 3.6 V
CB0 “L” Input Current, CB = 0 V
CB1 “H” Input Current, CB = 3.6 V
CB1 “L” Input Current, CB = 0 V
Shutdown Pin
Input Voltage
SHD “H” Voltage Threshold
SHD “L” Voltage Threshold
SHD “H” Input Current, SHD = 3.6 V
SHD “L” Input Current, SHD = 0 V
Feedback Pin
Input Voltage
Input Current, Vfb = 1.5 V
Sync PWM Mode Characteristics
Switching P−FET Current Limit
Duty Cycle
Minimum On Time
Rdson Switching P−FET and N_FET
Switching P−FET and N−FET Leakage Current
Output Overvoltage Threshold
Feedback Voltage Accuracy, V
out
Set = 1.05 V
C
B0
= L, C
B1
= L
I lim
DC
Ton min
Rdson
Ileak
Vo
V
out
−
−
−
−
−
−
1.018
800
−
75
0.23
0
3.0
1.050
−
100
−
−
10
−
1.082
mA
%
nsec
W
mA
%
V
Vfb
Ifb
−0.3
−
−
5.0
Vcc + 0.3
7.5
V
mA
Vshd
Vshd h
Vshd l
Ishd h
Ishd l
−0.3
−
400
−
−0.5
−
920
830
2.2
−
Vcc + 0.3
1200
−
−
−
V
mV
mV
mA
mA
Vcb
Vcb h
Vcb l
Icb0 h
Icb0 l
Icb1 h
Icb1 l
−0.3
−
400
−
−0.5
−
−
−
920
830
2.2
−
0.3
−2.2
Vcc + 0.3
1200
−
−
−
1.0
−
V
mV
mV
mA
mA
mA
mA
Vsync
Fsync
Dcsync Min
Dcsync Max
Vsynch
Vsyncl
Isynch
Isyncl
−0.3
450
−
−
−
400
−
−0.5
−
600
5.0
95
920
830
2.2
−
Vcc + 0.3
1000
−
−
1200
−
−
−
V
kHz
%
%
mV
mV
mA
mA
Iq PWM
Iq PWM
Iq Pulsed
Iq Off
Vin
−
−
−
−
2.5
175
185
14
0.1
−
−
−
−
1.0
5.2
mA
mA
mA
mA
V
Symbol
Min
Typ
Max
Unit
http://onsemi.com
4