DISCRETE SEMICONDUCTORS
DATA SHEET
ook, halfpage
M3D088
PDTA114YT
PNP resistor-equipped transistor
Product specification
1999 Apr 20
Philips Semiconductors
Product specification
PNP resistor-equipped transistor
FEATURES
•
Built-in bias resistors R1 and R2
(typ. 10 kΩ and 47 kΩ respectively)
•
Simplification of circuit design
•
Reduces number of components
and board space.
APPLICATIONS
•
Especially suitable for space
reduction in interface and driver
circuits
•
Inverter circuit configurations
without use of external resistors.
DESCRIPTION
PNP resistor-equipped transistor in a
SOT23 plastic package.
1
3
2
1
Top view
2
MAM100
PDTA114YT
handbook, 4 columns
3
3
R1
1
R2
2
Fig.1 Simplified outline (SOT23) and symbol.
MARKING
TYPE
NUMBER
PDTA114YT
Note
1.
∗
= p: Made in Hong Kong.
∗
= t: Made in Malaysia.
MARKING
CODE
(1)
∗29
PINNING
PIN
1
2
3
DESCRIPTION
base/input
emitter/ground (+)
collector/output
MGA893 - 1
Fig.2
Equivalent inverter
symbol.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
V
CBO
V
CEO
V
EBO
V
I
PARAMETER
collector-base voltage
collector-emitter voltage
emitter-base voltage
input voltage
positive
negative
I
O
I
CM
P
tot
T
stg
T
j
T
amb
Note
1. Refer to SOT23 standard mounting conditions.
output current (DC)
peak collector current
total power dissipation
storage temperature
junction temperature
operating ambient temperature
T
amb
≤
25
°C;
note 1
−
−
−
−
−
−65
−
−65
6
−40
−100
−100
250
+150
150
+150
V
V
mA
mA
mW
°C
°C
°C
CONDITIONS
open emitter
open base
open collector
−
−
−
MIN.
MAX.
−50
−50
−10
V
V
V
UNIT
1999 Apr 20
2
Philips Semiconductors
Product specification
PNP resistor-equipped transistor
THERMAL CHARACTERISTICS
SYMBOL
R
th j-a
Note
1. Refer to SOT23 standard mounting conditions.
CHARACTERISTICS
T
amb
= 25
°C
unless otherwise specified.
SYMBOL
I
CBO
I
CEO
I
EBO
h
FE
V
CEsat
V
i(off)
V
i(on)
R1
R2
-------
-
R1
C
c
PARAMETER
collector cut-off current
collector cut-off current
emitter cut-off current
DC current gain
collector-emitter saturation voltage
input-off voltage
input-on voltage
input resistor
resistor ratio
collector capacitance
I
E
= i
e
= 0; V
CB
=
−10
V; f = 1 MHz
CONDITIONS
I
E
= 0; V
CB
=
−50
V
I
B
= 0; V
CE
=
−30
V
I
B
= 0; V
CE
=
−30
V; T
j
= 150
°C
I
C
= 0; V
EB
=
−5
V
I
C
=
−5
mA; V
CE
=
−5
V
I
C
=
−5
mA; I
B
=
−0.25
mA
I
C
=
−100 µA;
V
CE
=
−5
V
I
C
=
−1
mA; V
CE
=
−0.3
V
MIN.
−
−
−
−
100
−
−
−1.4
7
3.7
−
PARAMETER
thermal resistance from junction to ambient
CONDITIONS
note 1
PDTA114YT
VALUE
500
UNIT
K/W
TYP.
−
−
−
−
−
−
−0.7
−0.8
10
4.7
−
MAX.
−100
−1
−50
−150
−
−100
−0.5
−
13
5.7
3
UNIT
nA
µA
µA
µA
mV
V
V
kΩ
pF
1999 Apr 20
3
Philips Semiconductors
Product specification
PNP resistor-equipped transistor
PDTA114YT
10
3
handbook, halfpage
hFE
(1)
(2)
MGR827
−10
3
handbook, halfpage
MGR826
VCEsat
(mV)
10
2
(3)
−10
2
(1)
(2)
10
(3)
1
−10
−1
−1
−10
IC (mA)
−10
2
−10
−1
−10
IC (mA)
−10
2
V
CE
=
−5
V.
(1) T
amb
= 100
°C.
(2) T
amb
= 25
°C.
(3) T
amb
=
−40 °C.
I
C
/I
B
= 20.
(1) T
amb
= 100
°C.
(2) T
amb
= 25
°C.
(3) T
amb
=
−40 °C.
Fig.3
DC current gain as a function of collector
current; typical values.
Fig.4
Collector-emitter saturation voltage as a
function of collector current; typical values.
handbook, halfpage
−2
MGR829
Vi(off)
(V)
−10
2
handbook, halfpage
Vi (on)
(V)
−10
MGR828
−1.6
−1.2
(1)
(2)
−0.8
(3)
−1
(1)
(2)
−0.4
(3)
0
−10
−2
−10
−1
−1
IC (mA)
−10
−10
−1
−10
−1
−1
−10
IC (mA)
−10
2
V
CE
=
−5
V.
(1) T
amb
= 100
°C.
(2) T
amb
= 25
°C.
(3) T
amb
=
−40 °C.
V
CE
=
−0.3
V.
(1) T
amb
=
−40 °C.
(2) T
amb
= 25
°C.
(3) T
amb
= 100
°C.
Fig.5
Input-off voltage as a function of collector
current; typical values.
Fig.6
Input-on voltage as a function of collector
current; typical values.
1999 Apr 20
4
Philips Semiconductors
Product specification
PNP resistor-equipped transistor
PACKAGE OUTLINE
Plastic surface mounted package; 3 leads
PDTA114YT
SOT23
D
B
E
A
X
HE
v
M
A
3
Q
A
A1
1
e1
e
bp
2
w
M
B
detail X
Lp
c
0
1
scale
2 mm
DIMENSIONS (mm are the original dimensions)
UNIT
mm
A
1.1
0.9
A
1
max.
0.1
b
p
0.48
0.38
c
0.15
0.09
D
3.0
2.8
E
1.4
1.2
e
1.9
e
1
0.95
H
E
2.5
2.1
L
p
0.45
0.15
Q
0.55
0.45
v
0.2
w
0.1
OUTLINE
VERSION
SOT23
REFERENCES
IEC
JEDEC
EIAJ
EUROPEAN
PROJECTION
ISSUE DATE
97-02-28
1999 Apr 20
5
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