1SMA4736~1SMA4757
SURFACE MOUNT SILICON ZENER DIODE
VOLTAGE
FEATURES
• For surface mounted applications in order to optimize board space.
• Low profile package
• Built-in strain relief
• Low inductance
• Typical I
R
less than 5.0µA above 11V
• Plastic package has Underwriters Laboratory Flammability
Classification 94V-O
• High temperature soldering : 260°C /10 seconds at terminals
•
Lead free in comply with EU RoHS 2002/95/EC directives.
.047(1.20)
6.8 to 51 Volts
POWER
1.0 Watts
• Glass passivated junction
MECHANICALDATA
• Case: JEDEC DO-214AC,Molded plastic over passivated junction.
• Terminals: Solder plated,solderable per MIL-STD-750, Method 2026
• Polarity: Color band denotes positive end (cathode)
• Standard Packaging:12mm tape (EIA-481)
• Weight: 0.0023 ounce, 0.0679 gram
MAXIMUM RATINGS AND ELECTRICAL CHARACTERISTICS
Ratings at 25°C ambient temperature unless otherwise specified.
Parameter
Peak Pulse Power Dissipation on T
A
=50
O
C (Notes A)
Derate above 50
O
C
Peak Forward Surge Current 8.3ms single half sine-wave
superimposed on rated load (JEDEC method)
Operating Junction and Storage Temperature Range
Symbol
Value
1.0
Units
W atts
P
D
I
FSM
T
J
,T
STG
10
-55 to + 150
Amps
O
C
NOTES:
A. Mounted on 5.0mm2 (.013mm thick) land areas.
B. Measured on8.3ms, and single half sine-wave or equivalent square wave ,duty cycle=4 pulses per minute maximum.
C. Tolerance and Type Number Designation. The type numbers listed have a standard tolerance on the nominal zener
voltage of ± 5%.
STAD-FEB.10.2009
1
PAGE . 1
1SMA4736~1SMA4757
N o m i n a l Ze n e r Vo l t a g e
Part N umber
N o m. V
V
Z
@ I
ZT
Min . V
Ma x . V
Ω
M a x i m u m Ze n e r I m p e d a n c e
Z
ZT
@ I
ZT
mA
Ω
Z
ZK
@ I
ZK
mA
Max R everse
Leakage C urrent
I
R
@ V
R
u A Ma x
V
Ma rk in g
Code
1.0 Watt ZEN ER
1SMA4736
1SMA4737
1SMA4738
1SMA4739
1SMA4740
1SMA4741
1SMA4742
1SMA4743
1SMA4744
1SMA4745
1SMA4746
1SMA4747
1SMA4748
1SMA4749
1SMA4750
1SMA4751
1SMA4752
1SMA4753
1SMA4754
1SMA4755
1SMA4756
1SMA4757
6.8
7.5
8.2
9.1
10
11
12
13
15
16
18
20
22
24
27
30
33
36
39
43
47
51
6.46
7.13
7.79
8.65
9.5
10.45
11.4
12.35
14.25
15.2
17.1
19
20.9
22.8
25.65
28.5
31.35
34.2
37.05
40.85
44.65
48.45
7.14
7.88
8.61
9.56
10.5
11.55
12.6
13.65
15.75
16.8
18.9
21
23.1
25.2
28.35
31.5
34.65
37.8
40.95
45.15
49.35
53.55
3.5
4
4.5
5
7
8
9
10
14
16
20
22
23
25
35
40
45
50
60
70
80
95
37
34
31
28
25
23
21
19
17
15.5
14
12.5
11.5
10.5
9.5
8.5
7.5
7
6.5
6
5.5
5
700
700
700
700
700
700
700
700
700
700
750
750
750
750
750
1000
1000
1000
1000
1500
1500
1500
1
0.5
0.5
0.5
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.25
0.25
5
5
5
0.5
0.5
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
4
5
6
7
7.6
8.4
9.1
9.9
11.4
12.2
13.7
15.2
16.7
18.2
20.6
22.8
25.1
27.4
29.7
32.7
35.8
38.8
736B
737B
738B
739B
740B
741B
742B
743B
744B
745B
746B
747B
748B
749B
750B
751B
752B
753B
754B
755B
756B
757B
RATING AND CHARACTERISTICS CURVES
P
D
, MAXIMUM POWER DISSIPATION (WATTS)
1.0
L=LEAD LENGTH
TO HEAT SINK
0.75
0.5
0.25
0
0
20
40
60
80 1 0 0
120
140 160 180
O
200
T
L
, LEAD TEMPERATURE ( C)
FIGURE.1 POWER TEMPERATURE DERATING CURVE
STAD-FEB.10.2009
1
PAGE . 2
FPGA/CPLD
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