MIC2586/MIC2586R
Single-Channel, Positive High-Voltage
Hot Swap Controller/Sequencer
NOT RECOMMENDED FOR NEW DESIGNS
General Description
The MIC2586 and MIC2586R are single-channel positive
voltage hot swap controllers/sequencers designed to
provide safe insertion and removal of boards for systems
that require live (always-powered) backplanes. These
devices use few external components and act as
controllers for external N-channel power MOSFET devices
to provide inrush current control and output voltage slew
rate control. Overcurrent fault protection is provided via
programmable analog foldback current-limit circuitry
equipped with a programmable overcurrent filter. These
protection circuits combine to limit the power dissipation of
the external MOSFET to insure that the MOSFET is in its
SOA during fault conditions.
The MIC2586 provides a circuit breaker function that
latches the output MOSFET off if the load current exceeds
the current-limit threshold for the duration of the
programmable timer. Conversely, the MIC2586R will
attempt to restart power after a load current fault with a low
duty cycle to prevent the MOSFET from overheating.
Each device provides either an active-HIGH (−1BM) or an
active-LOW (−2BM) “power-is-good” (PWRGD) signal.
The MIC2586 and the MIC2586R provide up to three,
time-sequenced PWRGD outputs that can be used as a
control for DC/DC converter circuits or power modules.
Data sheets and support documentation can be found on
Micrel’s web site at:
www.micrel.com.
Features
•
Operates from +10V to +80V with 100V ABS MAX
operation
•
Industrial temperature specifications at V
CC
= +24V and
V
CC
= +48V
•
Programmable current limit with analog foldback
•
Active current regulation minimizes inrush current
•
Electronic circuit breaker for overcurrent fault protection
•
Output latch off (MIC2586) or output auto-retry
(MIC2586R)
•
Fast responding circuit breaker (< 2µs) to short-circuit
loads
•
Programmable input undervoltage lockout
•
Fault Reporting:
Three open-drain PWRGD outputs for enabling DC/DC
converter(s)
−
Active-HIGH: MIC2586-1/MIC2586R-1
−
Active-LOW: MIC2586-2/MIC2586R-2
Applications
•
•
•
•
•
•
General-purpose hot board insertion
High-voltage, high-side electronic circuit breaker
+12V/+24V/+48V distributed power systems
+24V/+48V industrial/alarm systems
Telecom systems
Medical systems
Power, Connect and Protect is a trademark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 •
http://www.micrel.com
December 2012
M9999-122012
Micrel, Inc.
MIC2586/MIC2586R
Typical Application
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MIC2586/MIC2586R
Ordering Information
Part Number
Standard
MIC2586-1BM
MIC2586-2BM
MIC2586R-1BM
MIC2586R-2BM
Pb-Free
MIC2586-1YM
MIC2586-2YM
MIC2586R-1YM
MIC2586R-2YM
PWRGD Polarity
Active-HIGH
Active-LOW
Active-HIGH
Active-LOW
Circuit Breaker Function
Latched
Latched
Auto-Retry
Auto-Retry
Package
14-Pin SOIC
14-Pin SOIC
14-Pin SOIC
14-Pin SOIC
Pin Configuration
14-Pin SOIC (M)
MIC2586-1BM
MIC2586R-1BM
14-Pin SOIC (M)
MIC2586-1BM
MIC2586R-1BM
Pin Description
Pin Number
1, 8, 12
Pin Name
NC
Pin Function
Reserved: Make no external connections to these pins.
Enable Input: When the voltage at the ON pin is higher than the V
ONH
threshold, a start cycle is
initiated. An internal current source (I
GATEON
) is activated which charges the GATE pin, ramping
up the voltage at this pin to turn on an external MOSFET. Whenever the voltage at the ON pin is
lower than the V
ONL
threshold, an undervoltage lockout condition is detected and the I
GATEON
current source is disabled while the GATE pin is pulled low by another internal current source
(I
GATEOFF
). After a load current fault, toggling the ON pin LOW will reset the circuit breaker then
back HIGH (ON pin) will initiate another start cycle.
Output Voltage Feedback Input: This pin is connected to an external resistor divider that is used
to sample the output load voltage. The voltage at this pin is measured against an internal
comparator whose output controls the PWRGD (or /PWRGD) signal. PWRGD (or /PWRGD)
asserts when the FB pin voltage crosses the V
FBH
threshold. When the FB pin voltage is lower
than its V
FBL
threshold, PWRGD (or /PWRGD) is deasserted. The FB comparator exhibits a
typical hysteresis of 80mV.
The FB pin voltage also affects the MIC2586/MIC2586R’s foldback current limit operation (see the
Functional Description
section for further information).
2
ON
3
FB
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MIC2586/MIC2586R
Pin Description (Continued)
Pin Number
Pin Name
Pin Function
Power-is-Good (PWRGD1 or /PWRGD1), Open-Drain Output: This pin remains deasserted during
start up while the FB pin voltage is below the V
FBH
threshold. Once the voltage at the FB pin rises
above the V
FBH
threshold, the PWRGD output asserts with minimal delay (typically
≤
5µs).
For the (−1) options, the PWRGDx output pin will be high-impedance when the FB pin voltage is
higher than V
FBH
and will pull down to GND when the FB pin voltage is less than V
FBL
.
For the (−2) options, the /PWRGDx output pin will be high-impedance when the FB pin voltage is
lower than V
FBL
and will pull down to GND when the FB pin voltage is higher than V
FBH
.
Each PWRGD output pin is connected to an open-drain, N-channel transistor implemented with
high-voltage structures. These transistors are capable of operating with pull-up resistors to supply
voltages as high as 100V.
To use this signal as a logic control in low-voltage DC/DC conversion applications, an external
pull-up resistor between this pin and the logic supply voltage is recommended, unless an internal
pull-up impedance is provided by the DC/DC module or other device (load).
Power-is-Good 2 (PWRGD2 or /PWRGD2), Open-Drain Output: For the (−1) option, this output
signal is asserted when the following is true: PWRGD1 = Asserted AND the PWRGD1-to-
PWRGD2 delay (t
PG(1-2)
) has elapsed, where t
PG(1-2)
is the time delay programmed by the
capacitor (C
PG
) connected to the PGTIMER pin. Once PWRGD1 is asserted, an internal current
source (I
CPG
) begins to charge C
PG
. When the voltage on C
PG
crosses the V
PG2
threshold
(typically, 0.625V), PWRGD2 is asserted. The same description above applies to the (−2) option.
For further information, refer to the PWRGD1 and PGTIMER pin descriptions.
To use this signal as a logic control in low-voltage DC/DC conversion applications, an external
pull-up resistor between this pin and the logic supply voltage is recommended, unless internal
pull-up impedance is provided by the DC/DC module or other device (load).
Power-is-Good Delay Timer: A capacitor (C
PG
) connected from this pin to GND sets a delay from
PWRGD1 to PWRGD2 (t
PG(1-2)
) and from PWRGD1 to PWRGD3 (t
PG(1-3)
). An internal current
source (I
CPG
) is used to charge C
PG
only after PWRGD1 has been asserted. The same description
applies to the active-LOW (−2) output signals.
Power-is-Good Output 3 (PWRGD3 or /PWRGD3), Open-Drain Output: For the (−1) option, this
output signal is asserted when the following is true: PWRGD1 = Asserted AND the PWRGD1-to-
PWRGD3 delay (t
PG(1-3)
) has elapsed, where t
PG(1-3)
is the time delay programmed by the
capacitor (C
PG
) connected to the PGTIMER pin. Once PWRGD1 is asserted, an internal current
source (I
CPG
) begins to charge C
PG
. When the voltage on C
PG
crosses the V
PG3
threshold
(typically, 1.25V), PWRGD3 is asserted. The same description above applies to the (−2) option.
For further information, refer to the PWRGD1 and PGTIMER pin descriptions.
To use this signal as a logic control in low-voltage DC/DC conversion applications, an external
pull-up resistor between this pin and the logic supply voltage is recommended, unless internal
pull-up impedance is provided by the DC/DC module or other device (load).
Current-Limit Response Timer: A capacitor connected from this pin to GND provides overcurrent
filtering to prevent nuisance “tripping” of the circuit breaker by setting the time (t
FLT
) for which the
controller is allowed to remain in current limit. Once the MIC2586 circuit breaker trips, the output
latches off. Under normal (steady-state) operation, the TIMER pin is held to GND by an internal
3.5µA current source (I
TIMERDN
). When the voltage across the external sense resistor exceeds the
V
TRIP
threshold, an internal 65µA current source (I
TIMERUP
) is activated to charge the capacitor
connected to the TIMER pin. When the TIMER pin voltage reaches the V
TIMERH
threshold, the
circuit breaker is tripped pulling the GATE pin low, the I
TIMERUP
current source is disabled, and the
TIMER pin capacitor is discharged by the I
TIMERDN
current source. When the voltage at the TIMER
pin is less than 0.5V, the MIC2586 can be restarted by toggling the ON pin LOW then HIGH.
For the MIC2586R, the capacitor connected to the TIMER pin sets the period of auto-retry where
the duty cycle is fixed at a nominal 5%.
4
PWRGD1
(MIC2586-1)
(MIC2586R-1)
Active-HIGH
/PWRGD1
(MIC2586-2)
(MIC2586R-2)
Active-LOW
5
PWRGD2
(MIC2586-1)
(MIC2586R-1)
Active-HIGH
/PWRGD2
(MIC2586-2)
(MIC2586R-2)
Active-LOW
7
PGTIMER
9
PWRGD3
(MIC2586-1)
(MIC2586R-1)
Active-HIGH
/PWRGD3
(MIC2586-2)
(MIC2586R-2)
Active-LOW
10
TIMER
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MIC2586/MIC2586R
Pin Description (Continued)
Pin Number
Pin Name
Pin Function
Gate Drive Output: This pin is the output of an internal charge pump connected to the gate of an
external, N-channel power MOSFET. The charge pump has been designed to provide a minimum
gate drive (∆V
GATE
= V
GATE
- V
CC
) of +7.5V over the input supply’s full operating range. When the
ON pin voltage is higher than the V
ONH
threshold, a 16µA current source (I
GATEON
) charges the
GATE pin.
When in current limit, the output voltage at the GATE pin is adjusted so that the voltage across
the external sense resistor is held equal to V
TRIP
while the capacitor connected to the TIMER pin
charges. If the current-limit condition goes away before the TIMER pin voltage rises above the
V
TIMERH
threshold, then steady-state operation resumes.
The GATE output pin is shut down whenever: (1) the input supply voltage is lower than the V
UVL
threshold, (2) the ON pin voltage is lower than the V
ONL
threshold, (3) the TIMER pin voltage is
higher than the V
TIMERH
threshold, or (4) the difference between the VCC and SENSE pins is
greater than V
TRIP
while the TIMER pin is grounded. For cases (3) and (4) – overcurrent fault
conditions – the GATE is immediately pulled to ground by I
GATEFLT
, a 30mA (minimum) pulldown
current.
Circuit Breaker Sense Input: This pin is the (-) Kelvin sense connection for the output supply rail.
A low-valued resistor (R
SENSE
) between this pin and the VCC pin sets the circuit breaker’s current
limit trip point. When the current limit detector circuit is enabled (as well as the current-limit timer),
while the FB pin voltage remains higher than 1V, the voltage across the sense resistor (V
CC
-
V
SENSE
) will be regulated to V
TRIP
(47mV, typically) to maintain a constant current into the load.
When the FB pin voltage is less than
≅0.8V,
the voltage across the sense resistor decreases
linearly to a minimum of 12mV (typical) when the FB pin voltage is at 0V.
To disable the circuit breaker (and defeat all current limit protections), the SENSE pin and the
VCC pin can be tied together.
Positive Supply Voltage Input: This pin is the (+) Kelvin sense connection for the output supply
rail. The nominal operating voltage range for the MIC2586 and the MIC2586R is +10V to +80V,
and VCC can withstand input transients up to +100V. An undervoltage lockout circuit holds the
GATE pin low whenever the supply voltage to the MIC2586/MIC2586R is less than the V
UVH
threshold.
11
GATE
13
SENSE
14
VCC
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