INTEGRATED CIRCUITS
74F393
Dual 4-bit binary ripple counter
Product specification
IC15 Data Handbook
1988 Nov 01
Philips
Semiconductors
Philips Semiconductors
Product specification
Dual 4-bit binary ripple counter
74F393
FEATURES
•
Two 4-bit binary counters
•
Two Master Resets to clear each 4-bit counter individually
DESCRIPTION
The 74F393 is a Dual Ripple Counter with separate Clock (CP
n
) and
Master Reset (MR) inputs to each counter. The two counters are
identified by the “a” and “b” suffixes in the pin configuration. The
operation of each half of the 74F393 is the same. The counters are
triggered by a High-to-Low transition of the Clock (CP
a
and CP
b
)
inputs. The counter outputs are internally connected to provide
Clock inputs to succeeding stages. The outputs of the ripple counter
do not change synchronously and should not be used for high speed
address decoding. The Master Resets (MR
a
and MR
b
) are active
High asynchronous inputs; one for each 4-bit counter. A High level
in the MR input overrides the Clock and sets the outputs Low.
PIN CONFIGURATION
CPa
MRa
Q0a
Q1a
Q2a
Q3a
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
CPb
MRb
Q0b
Q1b
Q2b
Q3b
SF00704
TYPE
74F393
TYPICAL f
MAX
125MHz
TYPICAL SUPPLY CURRENT
(TOTAL)
40mA
ORDERING INFORMATION
DESCRIPTION
14-pin plastic DIP
14-pin plastic SO
COMMERCIAL RANGE
V
CC
= 5V
±10%,
T
amb
= 0°C to +70°C
N74F393N
N74F393D
PKG DWG #
SOT27-1
SOT108-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
CP
a
, CP
b
MR
a
, MR
b
Q
na
– Q
nb
Clock inputs
Master Reset inputs
Data outputs
DESCRIPTION
74F (U.L.) HIGH/LOW
1.0/1.0
1.0/1.0
50/33.3
LOAD VALUE HIGH/LOW
20µA/0.6mA
20µA/0.6mA
1.0mA/20mA
NOTE:
One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
LOGIC SYMBOL
IEC/IEEE SYMBOL (IEEE/IEC)
CTR DIV 16
CT=0
1
+
5
3
6
0
4
1
13
2
12
CP
a
CP
b
MR
a
MR
b
Q0a
Q1a
Q2a
Q3a
Q0b Q1b Q2b
Q3b
2
3
CTR DIV 16
12
CT=0
0
11
10
9
3
8
3
4
5
6
11
10
9
8
13
+
V
CC
= Pin 14
GND = Pin 7
SF00705
SF00706
1988 Nov 01
2
853–0295 94977
Philips Semiconductors
Product specification
Dual 4-bit binary ripple counter
74F393
LOGIC DIAGRAM
FUNCTION TABLE
OUTPUTS
COUNT
Q
0n
0
1
2
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
Q
1n
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
Q
2n
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
Q
3n
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
1, 13
CPn
J
CP
Q
J
CP
Q
J
CP
Q
J
CP
Q
K
Q
R
D
2, 12
MRn
K
Q
R
D
K
Q
R
D
K
Q
R
D
3, 11
Q0n
Q1n
4, 10
5, 9
Q2n
6, 8
Q3n
3
4
5
V
CC
= Pin 14
GND = Pin 7
6
SF00707
7
8
9
10
11
12
13
14
15
H = High voltage level transition
L = Low voltage level
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
V
CC
V
IN
I
IN
V
OUT
I
OUT
T
amb
T
stg
Supply voltage
Input voltage
Input current
Voltage applied to output in High output state
Current applied to output in Low output state
Operating free-air temperature range
Storage temperature range
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
–0.5 to V
CC
40
0 to +70
–65 to +150
UNIT
V
V
mA
V
mA
°C
°C
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
V
CC
V
IH
V
IL
I
IK
I
OH
I
OL
T
amb
1988 Nov 01
Supply voltage
High-level input voltage
Low-level input voltage
Input clamp current
High-level output current
Low-level output current
Operating free-air temperature range
3
0
PARAMETER
MIN
4.5
2.0
0.8
–18
–1
20
70
NOM
5.0
MAX
5.5
V
V
V
mA
mA
mA
°C
UNIT
Philips Semiconductors
Product specification
Dual 4-bit binary ripple counter
74F393
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST CONDITIONS
1
V
CC
= MIN, V
IL
= MAX
V
IH
= MIN, I
OH
= MAX
Low-level
Low level output voltage
Input clamp voltage
Input current at maximum input voltage
High-level input current
Low-level input current
Short-circuit output current
3
Supply current (total)
I
CCH
I
CCL
V
CC
= MIN, V
IL
= MAX
V
IH
= MIN, I
OL
= MAX
V
CC
= MIN, I
I
= I
IK
V
CC
= MAX, V
I
= 7.0V
V
CC
= MAX, V
I
= 2.7V
V
CC
= MAX, V
I
= 0.5V
V
CC
= MAX
V
CC
= MAX
–60
25
42
±10%V
CC
±5%V
CC
±10%V
CC
±5%V
CC
LIMITS
MIN
2.5
V
2.7
3.4
0.30
0.30
–0.73
0.50
V
0.50
–1.2
100
20
–0.6
–150
36
58
V
µA
µA
mA
mA
mA
mA
TYP
2
MAX
UNIT
V
O
OH
High-level
High level output voltage
V
O
OL
V
IK
I
I
I
IH
I
IL
I
OS
I
CC
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
CC
= 5V, T
amb
= 25°C.
3. Not more than one output should be shorted at a time. For testing I
OS
, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
OS
tests should be performed last.
AC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
V
CC
= +5V
T
amb
= +25°C
C
L
= 50pF, R
L
= 500Ω
MIN
f
MAX
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PHL
Maximum clock frequency
Propagation delay
CPn to Q0a or Q0b
Propagation delay
CPn to Q1a, Q1b
Propagation delay
CPn to Q2a, Q2b
Propagation delay
CPn to Q3a, Q3b
Propagation delay
MR to Qna, Qnb
Waveform 1
Waveform 1
Waveform 1
Waveform 1
Waveform 1
Waveform 2
100
3.5
5.0
5.0
7.5
8.0
9.5
10.5
12.0
4.0
TYP
130
5.5
7.0
7.0
9.5
10.0
11.5
12.5
14.0
6.0
8.0
10.0
10.0
12.0
13.0
14.5
15.5
16.5
9.0
MAX
V
CC
= +5V
±
10%
T
amb
= 0°C to +70°C
C
L
= 50pF, R
L
= 500Ω
MIN
100
3.5
5.0
4.5
7.0
7.0
9.0
10.0
11.5
4.0
9.0
10.5
13.0
13.0
15.0
15.5
17.0
17.5
9.0
MAX
MHz
ns
ns
ns
ns
ns
UNIT
1988 Nov 01
4
Philips Semiconductors
Product specification
Dual 4-bit binary ripple counter
74F393
AC SETUP REQUIREMENTS
LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
V
CC
= +5V
T
amb
= +25°C
C
L
= 50pF, R
L
= 500Ω
MIN
t
W
(H)
t
W
(L)
t
W
(H)
t
REC
CPn Pulse width
High or Low
MR Pulse width
High
Recovery time
MR to CPn
Waveform 1
Waveform 2
Waveform 2
4.5
3.5
3.5
2.5
TYP
MAX
V
CC
= +5V
±
10%
T
amb
= 0°C to +70°C
C
L
= 50pF, R
L
= 500Ω
MIN
5.0
4.0
4.5
3.0
MAX
ns
ns
ns
UNIT
AC WAVEFORMS
For all waveforms, V
M
= 1.5V.
1/f
MAX
CPn
V
M
t
w
(L)
t
PHL
t
w
(H)
CPn
t
PLH
t
PHL
Qna, Qnb
V
M
V
M
Qna, Qnb
V
M
V
M
V
M
MR
V
M
t
w
(H)
V
M
t
rec
SF00709
SF00708
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Width, and Maximum Clock Frequency
Waveform 2. Master Reset Pulse Width, Master Reset to
Output Delay, and Master Reset to Clock Recovery Time
TEST CIRCUIT AND WAVEFORMS
V
CC
NEGATIVE
PULSE
V
IN
PULSE
GENERATOR
R
T
D.U.T.
V
OUT
90%
V
M
10%
t
THL (
t
f
)
C
L
R
L
t
w
V
M
10%
t
TLH (
t
r
)
0V
90%
AMP (V)
t
TLH (
t
r
)
90%
POSITIVE
PULSE
V
M
10%
t
w
t
THL (
t
f
)
AMP (V)
90%
V
M
10%
0V
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
R
L
= Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
C
L
= Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
R
T
= Termination resistance should be equal to Z
OUT
of
pulse generators.
Input Pulse Definition
INPUT PULSE REQUIREMENTS
family
amplitude V
M
74F
3.0V
1.5V
rep. rate
1MHz
t
w
500ns
t
TLH
2.5ns
t
THL
2.5ns
SF00006
1988 Nov 01
5
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