74AUP2G157
Low-power 2-input multiplexer
Rev. 03 — 2 July 2008
Product data sheet
1. General description
The 74AUP2G157 is a high-performance, low-power, low-voltage, Si-gate CMOS device,
superior to most advanced CMOS compatible TTL families.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire V
CC
range from 0.8 V to 3.6 V. This device ensures a very low
static and dynamic power consumption across the entire V
CC
range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using I
OFF
.
The I
OFF
circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
The 74AUP2G157 is a single 2-input multiplexer which select data from two data inputs
(I0 and I1) under control of a common data select input (S). The state of the common data
select input determines the particular register from which the data comes. The output
(Y, Y) presents the selected data in the true (non-inverted) and complement form. The
enable input (E) is active LOW. When E is HIGH, the output Y is forced LOW and the
output Y is forced HIGH regardless of all other input conditions.
2. Features
I
Wide supply voltage range from 0.8 V to 3.6 V
I
High noise immunity
I
Complies with JEDEC standards:
N
JESD8-12 (0.8 V to 1.3 V)
N
JESD8-11 (0.9 V to 1.65 V)
N
JESD8-7 (1.2 V to 1.95 V)
N
JESD8-5 (1.8 V to 2.7 V)
N
JESD8-B (2.7 V to 3.6 V)
I
ESD protection:
N
HBM JESD22-A114E Class 3A exceeds 5000 V
N
MM JESD22-A115-A exceeds 200 V
N
CDM JESD22-C101C exceeds 1000 V
I
Low static power consumption; I
CC
= 0.9
µA
(maximum)
I
Latch-up performance exceeds 100 mA per JESD 78 Class II
I
Inputs accept voltages up to 3.6 V
I
Low noise overshoot and undershoot < 10 % of V
CC
I
I
OFF
circuitry provides partial Power-down mode operation
I
Multiple package options
I
Specified from
−40 °C
to +85
°C
and
−40 °C
to +125
°C
NXP Semiconductors
74AUP2G157
Low-power 2-input multiplexer
3. Ordering information
Table 1.
Ordering information
Package
Temperature range Name
74AUP2G157DC
74AUP2G157GT
74AUP2G157GD
74AUP2G157GM
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
−40 °C
to +125
°C
VSSOP8
XSON8
XSON8U
XQFN8U
Description
Version
plastic very thin shrink small outline package; 8 leads; SOT765-1
body width 2.3 mm
plastic extremely thin small outline package; no leads; SOT833-1
8 terminals; body 1
×
1.95
×
0.5 mm
plastic extremely thin small outline package; no leads; SOT996-2
8 terminals; UTLP based; body 3
×
2
×
0.5 mm
plastic extremely thin quad flat package; no leads; 8
terminals; UTLP based; body 1.6
×
1.6
×
0.5 mm
SOT902-1
Type number
4. Marking
Table 2.
Marking codes
Marking code
a2P
a2P
a2P
a2P
Type number
74AUP2G157DC
74AUP2G157GT
74AUP2G157GD
74AUP2G157GM
5. Functional diagram
G1
S
I0
I1
E
001aah769
EN
Y
Y
1
1
001aah770
MUX
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
S
E
Y
I0
I1
1
2
SELECTOR
6
S
E
MULTIPLEXER
OUTPUT
7
001aaf511
5
3
Y
Y
I1
Y
I0
001aaf512
Fig 3.
74AUP2G157_3
Logic diagram
Fig 4.
Functional diagram
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 2 July 2008
2 of 20
NXP Semiconductors
74AUP2G157
Low-power 2-input multiplexer
6. Pinning information
6.1 Pinning
74AUP2G157
I0
1
8
V
CC
I1
2
7
E
74AUP2G157
Y
I0
I1
Y
GND
1
2
3
4
001aaf513
3
6
S
8
7
6
5
V
CC
E
S
Y
GND
4
5
Y
001aaf514
Transparent top view
Fig 5.
Pin configuration SOT765-1 (VSSOP8)
Fig 6.
Pin configuration SOT833-1 (XSON8)
74AUP2G157
terminal 1
index area
E
1
V
CC
8
74AUP2G157
I0
I1
Y
GND
1
2
3
4
8
7
6
5
V
CC
7
I0
S
E
S
Y
Y
2
6
I1
3
4
5
Y
GND
001aaf515
001aai369
Transparent top view
Transparent top view
Fig 7.
Pin configuration SOT996-2 (XSON8U)
Fig 8.
Pin configuration SOT902-1 (XQFN8U)
6.2 Pin description
Table 3.
Symbol
Pin description
Pin
SOT765-1, SOT833-1
and SOT996-2
I0
I1
Y
GND
Y
74AUP2G157_3
Description
SOT902-1
7
6
5
4
3
data input from source 0
data input from source 1
complement multiplexer output
ground (0 V)
true multiplexer output
© NXP B.V. 2008. All rights reserved.
1
2
3
4
5
Product data sheet
Rev. 03 — 2 July 2008
3 of 20
NXP Semiconductors
74AUP2G157
Low-power 2-input multiplexer
Table 3.
Symbol
Pin description
…continued
Pin
SOT765-1, SOT833-1
and SOT996-2
SOT902-1
2
1
8
data select input
enable input (active LOW)
supply voltage
Description
S
E
V
CC
6
7
8
7. Functional description
Table 4.
Input
E
H
L
L
L
L
[1]
Function table
[1]
Output
S
X
L
L
H
H
I0
X
L
H
X
X
I1
X
X
X
L
H
Y
L
L
H
L
H
Y
H
H
L
H
L
H = HIGH voltage level; L = LOW voltage level; X = don’t care.
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
V
I
I
OK
V
O
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
Parameter
supply voltage
input clamping current
input voltage
output clamping current
output voltage
output current
supply current
ground current
storage temperature
total power dissipation
Conditions
V
I
< 0 V
[1]
Min
−0.5
−50
−0.5
−50
[1]
Max
+4.6
-
+4.6
-
+4.6
±20
50
-
+150
250
Unit
V
mA
V
mA
V
mA
mA
mA
°C
mW
V
O
< 0 V
Active mode and Power-down mode
V
O
= 0 V to V
CC
−0.5
-
-
−50
−65
T
amb
=
−40 °C
to +125
°C
[2]
-
The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For VSSOP8 packages: above 110
°C
the value of P
tot
derates linearly with 8.0 mW/K.
For XSON8, XSON8U and XQFN8U packages: above 45
°C
the value of P
tot
derates linearly with 2.4 mW/K.
74AUP2G157_3
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 2 July 2008
4 of 20
NXP Semiconductors
74AUP2G157
Low-power 2-input multiplexer
9. Recommended operating conditions
Table 6.
Symbol
V
CC
V
I
V
O
T
amb
∆t/∆V
Operating conditions
Parameter
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and fall rate
V
CC
= 0.8 V to 3.6 V
Active mode
Power-down mode; V
CC
= 0 V
Conditions
Min
0.8
0
0
0
−40
0
Max
3.6
3.6
V
CC
3.6
+125
200
Unit
V
V
V
V
°C
ns/V
10. Static characteristics
Table 7.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
T
amb
= 25
°C
V
IH
HIGH-level input voltage
V
CC
= 0.8 V
V
CC
= 0.9 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
CC
= 3.0 V to 3.6 V
V
IL
LOW-level input voltage
V
CC
= 0.8 V
V
CC
= 0.9 V to 1.95 V
V
CC
= 2.3 V to 2.7 V
V
CC
= 3.0 V to 3.6 V
V
OH
HIGH-level output voltage
V
I
= V
IH
or V
IL
I
O
=
−20 µA;
V
CC
= 0.8 V to 3.6 V
I
O
=
−1.1
mA; V
CC
= 1.1 V
I
O
=
−1.7
mA; V
CC
= 1.4 V
I
O
=
−1.9
mA; V
CC
= 1.65 V
I
O
=
−2.3
mA; V
CC
= 2.3 V
I
O
=
−3.1
mA; V
CC
= 2.3 V
I
O
=
−2.7
mA; V
CC
= 3.0 V
I
O
=
−4.0
mA; V
CC
= 3.0 V
V
OL
LOW-level output voltage
V
I
= V
IH
or V
IL
I
O
= 20
µA;
V
CC
= 0.8 V to 3.6 V
I
O
= 1.1 mA; V
CC
= 1.1 V
I
O
= 1.7 mA; V
CC
= 1.4 V
I
O
= 1.9 mA; V
CC
= 1.65 V
I
O
= 2.3 mA; V
CC
= 2.3 V
I
O
= 3.1 mA; V
CC
= 2.3 V
I
O
= 2.7 mA; V
CC
= 3.0 V
I
O
= 4.0 mA; V
CC
= 3.0 V
74AUP2G157_3
Conditions
Min
Typ
Max
-
-
-
-
Unit
V
V
V
V
0.70
×
V
CC
-
0.65
×
V
CC
-
1.6
2.0
-
-
-
-
V
CC
−
0.1
1.11
1.32
2.05
1.9
2.72
2.6
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.30
×
V
CC
V
0.35
×
V
CC
V
0.7
0.9
-
-
-
-
-
-
-
-
0.1
0.3
×
V
CC
0.31
0.31
0.31
0.44
0.31
0.44
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
0.75
×
V
CC
-
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 03 — 2 July 2008
5 of 20
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