SM5956A
6-channel Asynchronous Sample Rate Converter
OVERVIEW
The SM5956A is a digital audio signal, asynchronous sample rate converter LSI. It reads 6-channel 16/20/24-
bit word length input data, and 16/20/24-bit word length output data. It also features a built-in digital deempha-
sis filter, direct muting and digital audio interface output.
FEATURES
Functions
I
PINOUT
(Top view)
OMOD0
OMOD1
OWL0
OWL1
BCKO
LRCO
DITO
26
I
I
I
I
I
I
I
I
I
I
I
I
I
I
L/R 6-channel processing
(2-channel stereo, 3-system processing)
Input sample rate range: 10kHz to 200kHz
Output sample rate range: 30kHz to 50kHz
Operating sample rate conversion ratio (fso/fsi)
*1
• 0.45 to 4.41 (SCKSLN = L, 512fso operation)
• 0.225 to 4.41 (SCKSLN = H, 768fso operation)
*1
: fsi = input sample rate
fso = output sample rate
Asynchronous input timing and output timing
clock inputs
System clock input
• Input system clock: 1fsi (LRCI)
• Output-system clock: 512fso/768fso
(input on SCK)
Deemphasis filter function
• IIR filter structure
• 44.1kHz, 48kHz, 32kHz input sample rate fsi
compatible
Direct mute function
Through mode
• Input data passed directly to the outputs
Digital audio interface output
• DIA input data undergoes sample rate conver-
sion and is output biphase mark encoded
Output data clocks (LRCO, BCKO)
• LRCO rate: 1fso
• BCKO rate: 64fso (SCKSLN = L, 512fso operation)
48fso (SCKSLN = H, 768fso operation)
• Slave mode: Data is output at a rate dictated by
an externally input signal
• Master mode: Sample rate is generated internally
from the output-system clock, and
supplied as an output
MCU interface
• 3-wire serial interface
5V tolerant inputs for direct connection to 5V
devices
3.3V single supply
Package: 48-pin QFP
DOC
DOA
DOB
36
35
34
33
32
31
30
29
28
27
25
VDD
VSS
VDD
TEST0
TEST1
TEST2
TEST3
SCK
VSS
SCKSLN
ERROR
RSTN
SELFN
VSS
37
38
39
40
41
42
43
44
45
46
47
48
24
23
22
21
20
19
18
17
16
15
14
13
VSS
OEDITON
SLAVEN
THROUN
DMUTEN
MLE
MDT
MCK
FS1
FS0
DEEMN
VDD
IMOD1
10
TEST4
11
PACKAGE DIMENSIONS
(Unit: mm)
9 ± 0.4
7 ± 0.1
+ 0.075
0.125
−
0.025
7 ± 0.1
9 ± 0.4
IMOD0
BCKI
IWL0
IWL1
LRCI
VDD
VSS
12
1
2
3
4
5
6
7
8
DIA
DIB
DIC
9
1.4 ± 0.1
1.7 MAX
0 ~ 10
+ 0.09
0.18
−
0.05
Note. Dimensions without tolerance are reference values.
ORDERING INFORMATION
Device
SM5956AF
Package
48-pin QFP
0.1
0.5
0.08
SEIKO NPC CORPORATION —1
0.5 ± 0.2
SM5956A
FEATURES
Interfaces
I
Converter Performance
I
I
Input data format
• 2s-complement, MSB-first, L/R alternating serial
IIS/non-IIS formats
Format
IMOD1
L
L
H
H
IMOD0
L
H
L
H
I
IIS
MSB-first left-justified
MSB-first right-justified
MSB-first right-justified
I
I
Input word length
• 16/20/24-bit
Input word length
16 bits
20 bits
24 bits
24 bits
IWL1
L
L
H
H
IWL0
L
H
L
H
Internal data word length: 20 bits
Deemphasis filter characteristics (IIR filter)
• Gain deviation from ideal filter characteristic:
±
0.03dB
Anti-aliasing LPF characteristics
• Passband ripple:
±
0.0001dB
• Stopband attenuation:
>
98dB
Converter noise levels
• Internal calculation noise:
≤ −96dB
• Output round-off noise:
16-bit output mode :
−98dB
20-bit output mode :
−122dB
24-bit output mode :
−146dB
Input word length
Output word length
16 bits
16 bits
20 bits
24 bits
−92.3dB
−94.0dB
−94.1dB
20 bits
−94.0dB
−96.0dB
−96.1dB
24 bits
−94.0dB
−96.0dB
−96.2dB
Combined theoretical S/N
I
Output data format
• 2s-complement, MSB-first, L/R alternating serial
IIS/non-IIS format
• Continuous bit clock (64fso/48fso)
Format
OMOD1
L
L
H
H
OMOD0
L
H
L
H
IIS
MSB-first left-justified
MSB-first right-justified
MSB-first right-justified
I
Output word length
• 16/20/24-bit
Output word length
16 bits
20 bits
24 bits
24 bits
OWL1
L
L
H
H
OWL0
L
H
L
H
Structure
I
Silicon-gate CMOS process
Applications
I
I
Sample rate conversion between digital audio
equipment (AV amplifiers, CD-R/RW, MD, DVC
etc.)
Sample rate conversion in commercial record-
ing/editing equipment
SEIKO NPC CORPORATION —2
SM5956A
BLOCK DIAGRAM
LRCI
BCKI
DIA, DIB, DIC
ERROR
SCK
SCKSLN
RSTN
SELFN
Sequencer block
Input data interface
IMOD0
IMOD1
IWL0
Interpolation
operation
Arithmetic
operation block
Output data
operation
IWL1
Interpolation
filter operation
DEEMN
Conversion rate detector
Output timing
operation
Deemphasis
filter operation
FS0
FS1
MCK
MDT
MLE
MCU interface
Output operation
OMOD0
DITO
OEDITON
OMOD1
Digital audio interface
Output data interface
OWL0
OWL1
THROUN
SLAVEN
DMUTEN
Through, mute, and
slave mode control
LRCO BCKO
DOA, DOB, DOC
PIN DESCRIPTION
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
Name
VDD
LRCI
BCKI
DIA
DIB
DIC
IWL0
IWL1
IMOD0
IMOD1
TEST4
VSS
VDD
I/O
1
−
Is
Is
Is
Is
Is
I
I
I
I
Id
−
−
VDD supply (3.3V)
Sample rate clock input (fsi)
Bit clock input (32fsi to 64fsi)
Data input A
Data input B
Data input C
Input word length select 0
Input word length select 1
See “Input Interface Settings”
Input format select 0
Input format select 1
Test input
Ground (0V)
VDD supply (3.3V)
Test
−
−
Normal
−
−
Function
HIGH
−
−
−
−
−
−
LOW
−
−
−
−
−
−
SEIKO NPC CORPORATION —3
SM5956A
No.
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
Name
DEEMN
FS0
FS1
MCK
MDT
MLE
DMUTEN
THROUN
SLAVEN
OEDITON
VSS
VDD
DITO
OMOD1
OMOD0
OWL1
OWL0
DOC
DOB
DOA
BCKO
LRCO
VSS
VDD
TEST0
TEST1
TEST2
TEST3
SCK
VSS
SCKSLN
ERROR
RSTN
SELFN
VSS
I/O
1
I
I
I
Is
Is
Is
Id
Id
Id
Id
−
−
O
I
I
I
I
O
O
O
I/O
I/O
−
−
Id
Id
Id
Id
I
−
Id
O
Id
Id
−
Deemphasis select
Deemphasis frequency select 0
See “Sample Rate Conversion”
Deemphasis frequency select 1
MCU interface clock input
MCU interface data input
MCU interface latch enable input
Direct mute select
Through-mode select
Slave-mode select
DIT output enable select
Ground (0V)
VDD supply (3.3V)
Digital audio interface output
Output format select 1
Output format select 0
See “Output Interface Settings”
Output word length select 1
Output word length select 0
Data output C
Data output B
Data output A
Bit clock input/output (48fso/64fso)
Sample rate clock input/output (fso)
Ground (0V)
VDD supply (3.3V)
Test input
Test input
Test input
Test input
Output-system clock input (512fso/768fso)
Ground (0V)
Output-system clock select
Input error detector output
Reset input
Reset mode select
Ground (0V)
−
−
−
−
−
−
−
Test
Test
Test
Test
−
−
768fso
−
−
External
−
−
−
−
−
−
−
−
Normal
Normal
Normal
Normal
−
−
512fso
−
Reset
Automatic
−
−
−
−
Output
SRC
Master
L
−
−
−
−
−
−
Mute
Through
Slave
Output
−
−
−
Function
HIGH
OFF
LOW
ON
1. I = input, O = output, Id = input with pull-down, Is = Schmitt input,
−
= supply
SEIKO NPC CORPORATION —4
SM5956A
ABSOLUTE MAXIMUM RATINGS
V
SS
= 0V, VDD pins = V
DD
Parameter
Supply voltage
Input voltage
Output voltage
Storage temperature
Power dissipation
Symbol
V
DD
V
I
V
O
T
STG
P
W
Rating
−0.3
to 4.6
−0.3
to 5.5
−0.3
to V
DD
+ 0.3
−55
to 125
700
Unit
V
V
V
°C
mW
Note. Ratings also apply when power is turned ON/OFF.
RECOMMENDED OPERATING CONDITIONS
V
SS
= 0V, VDD pins = V
DD
Rating
Parameter
Supply voltage
Operating temperature
Symbol
min
V
DD
T
OPR
3.0
−40
typ
3.3
25
max
3.6
85
V
°C
Unit
SEIKO NPC CORPORATION —5
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