Preliminary Technical Data
FEATURES
Low offset voltage (V
OS
): 50 μV max
Very Low Voltage Noise: 1nV/√Hz max @ 100Hz
High Gain (h
FE
):
500 min at I
C
= 1mA
300 min at I
C
= 1μA
Excellent Log Conformance: r
BE
= 0.3 Ω
Low Offset Voltage Drift: 0.1 μV/ºC max
High Gain Bandwidth Product: 200MHz
Low Noise, Matched
Dual Monolithic Transistor
MAT12
PIN CONFIGURATION
Note: Substrate is connected to case on TO-78 package. Substrate is
normally connected to the most negative circuit potential, but can
be floated
GENERAL DESCRIPTION
The design of the MAT12 series of NPN dual monolithic transistors is optimized for very low noise, low drift and
low r
BE
. Exceptional characteristics of the MAT12 include offset voltage of 50
µV
max and high current gain (h
FE
)
which is maintained over a wide range of collector current. Device performance is specified over the full
temperature range as well as at 25°C.
Input protection diodes are provided across the emitter-base junctions to prevent degradation of the device
characteristics due to reverse-biased emitter current. The substrate is clamped to the most negative emitter by the
parasitic isolation junction created by the protection diodes. This results in complete isolation between the
transistors.
The MAT12 is ideal for applications where low noise is a priority. The MAT12 can be used as an input
stage to make an amplifier with noise voltage of less than 1.0 nV/√Hz at 100 Hz. Other applications, such as
log/antilog circuits, may use the excellent logging conformity of the MAT12. Typical bulk resistance is only 0.3
Ω
to 0.4
Ω.
The MAT12 electrical characteristics approach those of an ideal transistor when operated over a
collector current range of 1µA to 10 mA.
Rev. PrA
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2010 Analog Devices, Inc. All rights reserved.
MAT12
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS; V
CB
= 15V
V
CB
= 15 V, I
O
= 10μA, T
A
= 25°C, unless otherwise specified.
Table 1.
Parameter
Current Gain
Symbol
h
FE
Conditions
I
C
= 1mA (note 1)
-25ºC≤T
A
≤+85ºC
I
C
= 100μA
-25ºC≤T
A
≤+85ºC
I
C
= 10μA
-25ºC≤T
A
≤+85ºC
I
C
= 1μA
-25ºC≤T
A
≤+85ºC
10μA ≤ I
C
≤ 1mA (note 2)
I
C
= 1mA, V
CB
= 0 (note 3)
f
O
= 10Hz
f
O
= 100Hz
f
O
= 1kHz
f
O
= 10kHz
Preliminary Technical Data
Min
500
325
500
275
400
225
300
200
Typ
605
590
550
485
Max
Unit
Current Gain Match
Noise Voltage Density
Δh
FE
e
N
0.5
2
%
1.6
0.9
0.85
0.85
2
1
1
1
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
Offset Voltage
V
OS
V
CB
= 0, 1μA ≤ I
C
≤ 1mA
-25ºC≤T
A
≤+85ºC
0 ≤ V
CB
≤ V
MAX
(note 4)
1μA ≤ I
C
≤ 1mA (note 5)
1μA ≤ I
C
≤ 1mA (note 5),
V
CB
=0
10
50
70
25
μV
uV
μV
Offset Voltage Change vs. V
CB
ΔV
OS
/ΔV
CB
10
Offset Voltage Change vs. I
C
Offset Voltage Drift
ΔV
OS
/ΔI
C
ΔV
OS
/ΔT
5
0.08
0.03
40
25
0.3
0.3
μV
μV/ ºC
μV/ ºC
V
-25ºC≤T
A
≤+85ºC
-25ºC≤T
A
≤+85ºC, V
OS
trimmed to zero
Breakdown Voltage
Gain-Bandwidth Product
Collector-Base Leakage Current
BV
CEO
f
T
I
CBO
I
C
= 100mA, V
CE
= 10V
V
CB
=V
MAX
-25ºC≤T
A
≤+85ºC
V
CC
=V
MAX
(notes 6,7)
-25ºC≤T
A
≤+85ºC
V
BE
=0 (notes 6,7)
-25ºC≤T
A
≤+85ºC
200
25
2
35
3
35
3
200
MHz
pA
nA
pA
nA
pA
nA
Collector-Collector Leakage Current
I
CC
200
Collector-Emitter Leakage Current
I
CES
200
Rev. PrA | Page 2 of 4
Preliminary Technical Data
Input Bias Current
I
B
I
C
= 10μA
-25ºC≤T
A
≤+85ºC
I
C
= 10μA
-25ºC≤T
A
≤+85ºC
I
C
=10μA (note 6)
-25ºC≤T
A
≤+85ºC
25
45
0.6
8
MAT12
nA
nA
nA
nA
Input Offset Current
I
OS
Input Offset Current Drift
ΔI
OS
/ΔT
40
90
pA/ºC
Offset Current Change vs. V
CB
ΔI
OS
/ΔV
CB
0 ≤ V
CB
≤ V
MAX
(note 4)
30
70
pA/V
Collector Saturation Voltage
Output Capacitance
Bulk Resistance
Collector-Collector Capacitance
V
CE(SAT)
C
OB
r
BE
C
CC
I
C
= 1mA, I
B
=100μA
V
CB
=15V, I
E
=0
10μA≤I
C
≤10mA (note6)
V
CC
= 0
0.05
23
0.3
35
0.1
0.5
V
pF
Ω
pF
Notes:
1.
2.
3.
4.
5.
6.
7.
Current gain is guaranteed with Collector-Base Voltage (V
CB
) swept from 0 to V
MAX
at the indicated collector currents.
Current Gain Match (Δh
FE
) defined as: Δh
FE
= (100(ΔI
B
)( h
FE min
)/I
C
)
Noise Voltage Density is guaranteed, but not 100% tested
This is the maximum change in V
OS
as V
CB
is swept from 0V to 40V.
Measured at I
C
=10μA and guaranteed by design over the specified range of I
C
Guaranteed by Design
I
CC
and I
CES
are verified by measurement of I
CBO
Rev. PrA | Page 3 of 4
MAT12
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
Collector-Base Voltage (BV
CBO
)
Collector-Emitter Voltage (BV
CEO
)
Collector-Collector Voltage (BV
CC
)
Emitter-Emitter Voltage (BV
EE
)
Collector Current (I
C
)
Emitter Current (I
E
)
Storage Temperature Range H Packages
Operating Temperature Range
Junction Temperature Range RM, CP Packages
Lead Temperature (Soldering, 60 sec)
1
Preliminary Technical Data
THERMAL RESISTANCE
Rating
40 V
40V
40V
40V
20 mA
20 mA
−65°C to +150°C
−25°C to +85°C
−65°C to +150°C
300°C
θ
JA
is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 3. Thermal Resistance
Package Type
TO-78 (H)
θ
JA
TBD
θ
JC
TBD
Unit
ºC/W
ESD CAUTION
Differential input voltage is limited to 5 V or the supply voltage, whichever
is less.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
©2010 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
PR09044-0-4/10(PrA)
Rev. PrA | Page 4 of 4
51单片机
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
