SN54LVTH162240, SN74LVTH162240
,
3.3-V ABT 16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
www.ti.com
SCBS685F – MARCH 1997 – REVISED NOVEMBER 2006
FEATURES
•
•
Members of the Texas Instruments Widebus™
Family
State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V Operation
and Low Static-Power Dissipation
Output Ports Have Equivalent 22-Ω Series
Resistors, So No External Resistors Are
Required
Support Mixed-Mode Signal Operation
(5-V Input and Output Voltages With
3.3-V V
CC
)
Support Unregulated Battery Operation Down
to 2.7 V
Typical V
OLP
(Output Ground Bounce) <0.8 V
at V
CC
= 3.3 V, T
A
= 25°C
I
off
and Power-Up 3-State Support Hot
Insertion
Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
Distributed V
CC
and GND Pin Configuration
Minimizes High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB
Layout
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Package Options Include Plastic Shrink
Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages and 380-mil
Fine-Pitch Ceramic Flat (WD) Package Using
25-mil Center-to-Center Spacings
SN54LVTH162240 . . . WD PACKAGE
SN74LVTH162240 . . . DGG OR DL PACKAGE
(TOP VIEW)
•
•
•
•
•
•
•
•
•
•
1OE
1Y1
1Y2
GND
1Y3
1Y4
V
CC
2Y1
2Y2
GND
2Y3
2Y4
3Y1
3Y2
GND
3Y3
3Y4
V
CC
4Y1
4Y2
GND
4Y3
4Y4
4OE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
2OE
1A1
1A2
GND
1A3
1A4
V
CC
2A1
2A2
GND
2A3
2A4
3A1
3A2
GND
3A3
3A4
V
CC
4A1
4A2
GND
4A3
4A4
3OE
•
DESCRIPTION/ORDERING INFORMATION
The 'LVTH162240 devices are 16-bit buffers/drivers designed specifically for low-voltage (3.3-V) V
CC
operation
and to improve both the performance and density of 3-state memory address drivers, clock drivers, and
bus-oriented receivers and transmitters. They have the capability to provide a TTL interface to a 5-V system
environment.
These devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer and provide inverting
outputs and symmetrical active-low output-enable (OE) inputs.
The outputs, which are designed to source or sink up to 12 mA, include equivalent 22-Ω series resistors to
reduce overshoot and undershoot.
When V
CC
is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE should be tied to V
CC
through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
UNLESS OTHERWISE NOTED this document contains
PRODUCTION DATA information current as of publication date.
Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1997–2006, Texas Instruments Incorporated
SN54LVTH162240, SN74LVTH162240
,
3.3-V ABT 16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS685F – MARCH 1997 – REVISED NOVEMBER 2006
www.ti.com
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
These devices are fully specified for hot-insertion applications using I
off
and power-up 3-state. The I
off
circuitry
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
The SN54LVTH162240 is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74LVTH162240 is characterized for operation from –40°C to 85°C.
ORDERING INFORMATION
T
A
PACKAGE
(1)
Reel of 1000
SSOP – DL
–40°C to 85°C
TSSOP – DGG
(1)
Tube of 25
Reel of 2000
ORDERABLE PART NUMBER
74LVTH162240DLRG4
SN74LVTH162240DLR
74LVTH162240DLG4
SN74LVTH162240DL
74LVTH162240DGGRE4
SN74LVTH162240DGGR
LVTH162240
LVTH162240
TOP-SIDE MARKING
Package drawings, standard packing quantities, thermal data, symbolization, and PCB guidelines are available at
www.ti.com/sc/package.
FUNCTION TABLE
(each 4-bit buffer)
INPUTS
OE
L
L
H
A
H
L
X
OUTPUT
Y
L
H
Z
2
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SN54LVTH162240, SN74LVTH162240
,
3.3-V ABT 16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS685F – MARCH 1997 – REVISED NOVEMBER 2006
www.ti.com
LOGIC DIAGRAM (POSITIVE LOGIC)
1OE
1
3OE
2
25
1A1
47
1Y1
3A1
36
13
3Y1
1A2
46
3
1Y2
3A2
35
14
3Y2
1A3
44
5
1Y3
3A3
33
16
3Y3
1A4
43
6
1Y4
3A4
32
17
3Y4
2OE
48
4OE
8
24
2A1
41
2Y1
4A1
30
19
4Y1
2A2
40
9
2Y2
4A2
29
20
4Y2
2A3
38
11
2Y3
4A3
27
22
4Y3
2A4
37
12
2Y4
4A4
26
23
4Y4
Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
MIN
V
CC
V
I
V
O
V
O
I
O
I
O
I
IK
I
OK
θ
JA
T
stg
(1)
(2)
(3)
(4)
Supply voltage range
Input voltage
range
(2)
state
(2)
Voltage range applied to any output in the high-impedance or power-off state
(2)
Voltage range applied to any output in the high
Current into any output in the low state
Current into any output in the high state
(3)
Input clamp current
Output clamp current
Package thermal impedance
(4)
Storage temperature range
V
I
< 0
V
O
< 0
DGG package
DL package
–65
–0.5
–0.5
–0.5
–0.5
MAX
4.6
7
7
V
CC
+ 0.5
30
30
–50
–50
89
94
150
UNIT
V
V
V
V
mA
mA
mA
mA
°C/W
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
This current flows only when the output is in the high state and V
O
> V
CC
.
The package thermal impedance is calculated in accordance with JESD 51.
4
Submit Documentation Feedback
www.ti.com
SN54LVTH162240, SN74LVTH162240
,
3.3-V ABT 16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS685F – MARCH 1997 – REVISED NOVEMBER 2006
Recommended Operating Conditions
(1)
SN54LVTH162240
(2)
MIN
V
CC
V
IH
V
IL
V
I
I
OH
I
OL
∆t/∆v
∆t/∆V
C
C
SN74LVTH162240
MIN
2.7
2
MAX
3.6
0.8
5.5
–12
12
10
200
MAX
3.6
0.8
5.5
–12
12
UNIT
V
V
V
V
mA
mA
ns/V
µs/V
Supply voltage
High-level input voltage
Low-level input voltage
Input voltage
High-level output current
Low-level output current
Input transition rise or fall rate
Power-up ramp rate
Operating free-air temperature
Outputs enabled
2.7
2
10
200
–55
125
T
A
(1)
(2)
–40
85
°C
All unused control inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs,
literature number SCBA004.
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