November 1996
NDP6051L / NDB6051L
N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
These logic level N-Channel enhancement mode power field
effect transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high density
process has been especially tailored to minimize on-state
resistance, provide superior switching performance, and
withstand high energy pulses in the avalanche and
commutation modes. These devices are particularly suited for
low voltage applications such as automotive, DC/DC
converters, PWM motor controls, and other battery powered
circuits where fast switching, low in-line power loss, and
resistance to transients are needed.
Features
48 A, 50 V. R
DS(ON)
= 0.023
Ω
@ V
GS
= 5 V
R
DS(ON)
= 0.018
Ω
@ V
GS
= 10 V.
Low drive requirements allowing operation directly from logic
drivers. V
GS(TH)
< 2.0V.
Rugged internal source-drain diode can eliminate the need
for an external Zener diode transient suppressor.
175°C maximum junction temperature rating.
High density cell design for extremely low R
DS(ON)
.
TO-220 and TO-263 (D
2
PAK) package for both through hole
and surface mount applications.
________________________________________________________________________________
D
G
S
Absolute Maximum Ratings
Symbol
V
DSS
V
DGR
V
GSS
I
D
Parameter
Drain-Source Voltage
T
C
= 25°C unless otherwise noted
NDP6051L
50
50
±10
±20
48
120
100
0.67
-65 to 175
NDB6051L
Units
V
V
V
Drain-Gate Voltage (R
GS
< 1 M
Ω
)
Gate-Source Voltage - Continuous
- Nonrepetitive (t
P
< 50 µs)
Drain Current
- Continuous
- Pulsed
A
P
D
Maximum Power Dissipation @ T
C
= 25°C
Derate above 25°C
W
W/°C
°C
T
J
,T
STG
Operating and Storage Temperature Range
© 1997 Fairchild Semiconductor Corporation
NDP6051L Rev.A
Electrical Characteristics
(T
C
= 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
DRAIN-SOURCE AVALANCHE RATINGS
(Note 1)
W
DSS
I
AR
BV
DSS
I
DSS
I
GSSF
I
GSSR
V
GS(th)
R
DS(ON)
Single Pulse Drain-Source Avalanche
Energy
V
DD
= 25 V, I
D
= 48 A
200
48
mJ
A
Maximum Drain-Source Avalanche Current
OFF CHARACTERISTICS
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
V
GS
= 0 V, I
D
= 250 µA
V
DS
= 50 V, V
GS
= 0 V
T
J
= 125°C
Gate - Body Leakage, Forward
Gate - Body Leakage, Reverse
V
GS
= 10 V, V
DS
= 0 V
V
GS
= -10 V, V
DS
= 0 V
V
DS
= V
GS
, I
D
= 250 µA
T
J
= 125°C
Static Drain-Source On-Resistance
V
GS
= 5 V, I
D
= 24 A
T
J
= 125°C
V
GS
= 10 V, I
D
= 27 A
I
D(on)
g
FS
On-State Drain Current
Forward Transconductance
V
GS
= 5 V, V
DS
= 10 V
V
DS
= 5 V, I
D
= 24 A
V
DS
= 25 V, V
GS
= 0 V,
f = 1.0 MHz
48
28
1
0.65
1.4
0.98
0.021
0.03
0.014
50
250
1
100
100
V
µA
mA
nA
nA
ON CHARACTERISTICS
(Note 1)
Gate Threshold Voltage
2
1.5
0.023
0.035
0.018
A
S
V
Ω
DYNAMIC CHARACTERISTICS
C
iss
C
oss
C
rss
t
D(on)
t
r
t
D(off)
t
f
Q
g
Q
gs
Q
gd
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
1490
515
190
pF
pF
pF
SWITCHING CHARACTERISTICS
(Note 1)
Turn - On Delay Time
Turn - On Rise Time
Turn - Off Delay Time
Turn - Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DS
= 24 V
I
D
= 48 A , V
GS
= 5 V
V
DD
= 25 V, I
D
= 24 A,
V
GS
= 5 V, R
GEN
= 10
Ω
16
135
43
94
34
6
21
40
280
90
200
48
nS
nS
nS
nS
nC
nC
nC
NDP6051L Rev.A
Electrical Characteristics
(T
C
= 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
DRAIN-SOURCE DIODE CHARACTERISTICS
I
S
I
SM
V
SD
Maximum Continuos Drain-Source Diode Forward Current
Maximum Pulsed Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= 24 A (
Note 1)
T
J
= 125°C
t
rr
I
rr
Reverse Recovery Time
Reverse Recovery Current
V
GS
= 0 V, I
F
= 48 A,
dI
F
/dt = 100 A/µs
0.9
0.83
63
3.1
48
120
1.3
1.2
130
8
A
A
V
V
ns
A
THERMAL CHARACTERISTICS
R
θ
JC
R
θ
JA
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
1.5
62.5
°C/W
°C/W
Note:
1. Pulse Test: Pulse Width < 300 µs, Duty Cycle < 2.0%.
NDP6051L Rev.A
Typical Electrical Characteristics
100
2
V
GS
= 10V
I
D
, DRAIN-SOURCE CURRENT (A)
80
7.0
DRAIN-SOURCE ON-RESISTANCE
6.0
5.0
4.5
R
DS(on)
, NORMALIZED
V
GS
= 3V
1.6
3.5
4.0
60
4.0
40
1.2
4.5
5.0
6.0
7.0
3.5
3.0
2.5
0.8
20
10
0
0
1
2
3
V
DS
, DRAIN-SOURCE VOLTAGE (V)
4
5
0.4
0
20
40
60
I
D
, DRAIN CURRENT (A)
80
100
Figure 1. On-Region Characteristics
.
Figure 2. On-Resistance Variation
with Drain Current and Gate Voltage.
2
2
DRAIN-SOURCE ON-RESISTANCE
R
DS(ON)
, NORMALIZED
V
GS
= 5V
1.6
R
DS(on)
, NORMALIZED
1.4
1.2
1
0.8
0.6
0.4
-50
DRAIN-SOURCE ON-RESISTANCE
1.8
I
D
=24A
V
GS
= 5.0 V
TJ = 125°C
1.5
25°C
1
-55°C
0.5
-25
0
25
50
75
100
125
T
J
, JUNCTION TEMPERATURE (°C)
150
175
0
20
40
60
I
D
, DRAIN CURRENT (A)
80
100
Figure 3. On-Resistance Variation
with Temperature
.
Figure 4. On-Resistance Variation
with Drain Current and Temperature
.
60
1.3
V
DS
= 5V
50
GATE-SOURCE THRESHOLD VOLTAGE
T = -55°C
J
25°C
125°C
V
th
, NORMALIZED
1.2
1.1
1
0.9
0.8
0.7
0.6
0.5
-50
V
DS
= V
GS
I
D
= 250µA
I
D
, DRAIN CURRENT (A)
40
30
20
10
0
0
1
2
3
4
V
GS
, GATE TO SOURCE VOLTAGE (V)
5
6
-25
0
25
50
75
100
125
T , JUNCTION TEMPERATURE (°C)
J
150
175
Figure 5. Transfer Characteristics
.
Figure 6. Gate Threshold Variation
with Temperature
.
NDP6051L Rev.A
Typical Electrical Characteristics
(continued)
1.15
60
DRAIN-SOURCE BREAKDOWN VOLTAGE
I
D
= 250µA
1.1
I
S
, REVERSE DRAIN CURRENT (A)
20
10
V
GS
=0V
TJ = 125°C
25°C
BV
DSS
, NORMALIZED
1
1.05
-55°C
0.1
1
0.01
0.95
0.001
0.0001
0.9
-50
0
0.2
0.4
0.6
0.8
1
1.2
1.4
-25
0
T
J
25
50
75
100
125
, JUNCTION TEMPERATURE (°C)
150
175
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 7. Breakdown Voltage
Variation with Temperature
.
Figure 8. Body Diode Forward Voltage Variation
with Current and Temperature
.
4000
2500
, GATE-SOURCE VOLTAGE (V)
10
I
D
= 48A
8
V
DS
= 12V
24V
48V
1500
CAPACITANCE (pF)
1000
Ciss
6
500
300
Coss
f = 1 MHz
V
GS
= 0 V
Crss
4
150
100
0.1
0 .2
0 .5
5
15
20
50
V
0
0
10
20
30
40
Q
g
, GATE CHARGE (nC)
50
60
1
10
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
GS
2
Figure 9. Capacitance Characteristics
.
Figure 10. Gate Charge Characteristics
.
V
DD
t
on
t
off
t
r
90%
V
IN
D
R
L
V
OUT
DUT
t
d(on)
t
d(off)
90%
t
f
V
GEN
R
GEN
R
GS
G
V
OUT
10%
10%
INVERTED
90%
S
V
IN
10%
50%
50%
PULSE WIDTH
Figure 11. Switching Test Circuit
.
Figure 12. Switching Waveforms
.
NDP6051L Rev.A
模拟电子
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