MIC502
Fan Management IC
General Description
Features
The MIC502 is a thermal and fan management IC which
•
Temperature-proportional fan speed control
supports the features for NLX/ATX power supplies and
•
Low-cost, efficient PWM fan drive
other control applications.
•
4.5V to 13.2V IC supply range
Fan speed is determined by an external temperature
•
Controls any voltage fan
sensor, typically a thermistor-resistor divider, and (option-
•
Overtemperature detection with fault output
ally) a second signal, such as the NLX “FanC” signal. The
•
Integrated fan startup timer
MIC502 produces a low-frequency pulse-width modulated
output for driving an external motor drive transistor. Low-
•
Automatic user-specified sleep mode
frequency PWM speed control allows operation of
•
Supports low-cost NTC/PTC thermistors
standard brushless dc fans at low duty cycle for reduced
•
8-pin DIP and SOIC packages
acoustic noise and permits the use of a very small power
transistor. The PWM time base is determined by an
external capacitor.
Applications
An open-collector overtemperature fault output is asserted
•
NLX and ATX power supplies
if the primary control input is driven above the normal
•
Personal computers
control range.
•
File servers
The MIC502 features a low-power sleep mode with a user-
•
Telecom and networking hardware
determined threshold. Sleep mode completely turns off the
fan and occurs when the system is asleep or off (both
•
Printers, copiers, and office equipment
control inputs very low). A complete shutdown or reset can
•
Instrumentation
also be initiated by external circuitry as desired.
•
Uninterruptible power supplies
The MIC502 is available as 8-pin plastic DIP and SOIC
•
Power amplifiers
packages in the –40°C to +85°C industrial temperature
range.
Data sheets and support documentation can be found on
Micrel’s web site at www.micrel.com.
___________________________________________________________________________________________________________
Typical Application
12V
T1
R2
R1
1
2
3
MIC502
VT1
CF
GND
VDD
OUT
VT2
8
7
6
5
Fan
R
B A S E
Q1
R3
R4
V S L P OT F
4
C
F
Overtemperature
Fault Output
Secondary
Fan-contro
l
Input
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (
408
) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
November 2006
1
M9999-112206
Micrel, Inc.
MIC502
Ordering Information
Part Number
MIC502BN
MIC502YN
MIC502BM
MIC502YM
Temperature Range
–40° to +85°C
–40° to +85°C
–40° to +85°C
–40° to +85°C
Package
8-Pin Plastic DIP
8-Pin Plastic DIP
8-Pin SOIC
8-Pin SOIC
Lead Finish
Standard
Pb-Free
Standard
Pb-Free
Pin Configuration
VT1 1
CF 2
VSLP 3
GND 4
8 VDD
7 OUT
6 OTF
5 VT2
8-Pin SOIC (M)
8-Pin DIP (N)
Pin Description
Pin Number
1
Pin Name
VT1
Pin Function
Thermistor 1 (Input): Analog input of approximately 30% to 70% of V
DD
produces active duty cycle of 0% to 100% at driver output (OUT). Connect to
external thermistor network (or other temperature sensor). Pull low for shutdown.
PWM Timing Capacitor (External Component): Positive terminal for the PWM
triangle-wave generator timing capacitor. The recommended C
F
is 0.1µF for
30Hz PWM operation.
Sleep Threshold (Input): The voltage on this pin is compared to VT1 and VT2.
When V
T1
< V
SLP
and V
T2
< V
SLP
the MIC502 enters sleep mode until V
T1
orV
T2
rises above V
WAKE
. (V
WAKE
= V
SLP
+ V
HYST
). Grounding V
SLP
disables the sleep-
mode function.
Ground.
Thermistor 2 (Input): Analog input of approximately 30% to 70% of V
DD
produces active duty cycle of 0% to 100% at driver output (OUT). Connect to
motherboard fan control signal or second temperature sensor.
Overtemperature Fault (Output): Open-collector output (active low).Indicates
overtemperature fault condition (V
T1
> V
OT
) when active.
Driver Output: Asymmetrical-drive active-high complimentary PWM output.
Typically connect to base of external NPN motor control transistor.
Power Supply (Input): IC supply input; may be independent of fan power supply.
2
CF
3
VSLP
4
5
GND
VT2
6
7
8
/OTF
OUT
VDD
November 2006
2
M9999-112206
Micrel, Inc.
MIC502
Absolute Maximum Ratings
(1)
Supply Voltage (V
DD
)....................................................+14V
Output Sink Current (I
OUT(sink)
) .....................................10mA
Output Source Current (I
OUT(source)
) ..............................25mA
Input Voltage (any pin) .......................... –0.3V to V
DD
+0.3V
Junction Temperature (T
J
) ....................................... +125°C
Lead Temperature (soldering, 5 sec.)........................ 260°C
Storage Temperature (T
A
).........................–65°C to +150°C
ESD Rating
(3)
Operating Ratings
(2)
Supply Voltage (V
DD
)....................................... +4V to 13.2V
Sleep Voltage (V
SLP
).......................................... GND to V
DD
Temperature Range (T
A
)............................. –40°C to +85°C
Power Dissipation at 25°C
SOIC ..................................................................800mW
DIP.....................................................................740mW
Derating Factors
SOIC ..............................................................8.3mW/°C
Plastic DIP .....................................................7.7mW/°C
Electrical Characteristics
4.5V
≤
V
DD
≤
13.2V,
Note 4;
T
A
= 25°C,
bold
values indicate –40°C
≤
T
A
< +85°C, unless noted.
Symbol
I
DD
I
DD(slp)
Parameter
Supply Current, Operating
Supply Current, Sleep
Condition
V
SLP
= GND, OTF, OUT = open,
C
F
= 0.1µF, V
T1
= V
T2
= 0.7 V
DD
V
T1
= GND, V
SLP
, OTF, OUT = open,
C
F
= 0.1µF
I
OH
= 10mA
I
OL
= 1mA
V
OL
= 0.5V
4.5V
≤
V
DD
≤
5.5V, V
OH
= 2.4V
10.8V
≤
V
DD
≤
13.2V, V
OH
= 3.2V
V
OUT
= 0V
Min
Typ
Max
1.5
500
Units
mA
µA
Driver Output
t
R
t
F
I
OL
I
OH
I
OS
V
PWM(max)
V
PWM(span)
V
HYST
V
IL
V
IH
V
OT
I
VT
, I
VSLP
t
RESET
Output Rise Time,
Note 5
Output Fall Time,
Note 5
Output Sink Current
Output Source Current
Sleep-Mode Output Leakage
100% PWM Duty Cycle Input
Voltage
V
PWM(max)
– V
PWM(min)
Sleep Comparator Hysteresis
VT1 Shutdown Threshold
VT1 Startup Threshold
VT1 Overtemperature Fault
Threshold
VT1, VT2, VSLP Input Current
Reset Setup Time
minimum time V
T1
< V
IL
, to guarantee reset,
Note 5
4.5V
≤
V
DD
≤
5.5V, C
F
= 0.1µF
10.8V
≤
V
DD
≤
13.2V, C
F
= 0.1µF
f
MIN
, f
MAX
t
STARTUP
Oscillator Frequency Range
Startup Interval
50
50
µs
µs
mA
mA
mA
1
µA
0.9
10
10
Thermistor and Sleep Inputs
67
37
8
1.1
Note 6
74
–2.5
77
70
40
11
73
43
14
0.7
80
1
%V
DD
%V
DD
%V
DD
V
V
%V
DD
µA
µs
30
Oscillator
f
Oscillator Frequency,
Note 7
24
27
15
27
30
64/f
30
33
90
Hz
Hz
Hz
S
Note 7
November 2006
3
M9999-112206
Micrel, Inc.
Symbol
V
OL
I
OH
Notes:
1. Exceeding the absolute maximum rating may damage the device.
2. The device is not guaranteed to function outside its operating rating.
3. Devices are ESD sensitive. Handling precautions recommended.
MIC502
Parameter
Active (Low) Output Voltage
Off-State Leakage
Condition
I
OL
= 2mA
V
/OTF
= V
DD
Min
Typ
Max
0.3
Units
V
µA
Overtemperature Fault Output
1
4. Part is functional over this V
DD
range; however, it is characterized for operation at 4.5V
≤
V
DD
≤
5.5V and 10.8V
≤
V
DD
≤
13.2V ranges. These ranges
correspond to nominal V
DD
of 5V and 12V, respectively.
5. Guaranteed by design.
6. V
OT
is guaranteed by design to always be higher than V
PWM(max)
.
7. Logic time base and PWM frequency. For other values of C
F
, f(Hz) = 30Hz
0.1
µ
F
, where C is in µF.
C
Timing Diagrams
V
O T
0.7V
DD
V
T 1
V
T 2
V
S L P
0.3V
DD
80%
50%
40%
70%
40%
100%
Input
Signal
Range
30%
0%
V
IH
V
IL
0V
V
O T F
V
O H
V
OL
0V
F
V
OU T
V
O H
V
OL
0V
A
t
PW M
B
C
D
E
t
S T A R T U P
G
Output
Duty Cycle
50%
80%
40%
70%
0%
100%
40%
Figure 1. Typical System Behavior
Note A.
Note B.
Note C.
Note D.
Note E.
Note F.
Output duty-cycle is initially determined by V
T1
, as it is greater than V
T2
.
PWM duty-cycle follows V
T1
as it increases.
V
T1
drops below V
T2
. V
T2
now determines the output duty-cycle.
The PWM duty-cycle follows V
T2
as it increases.
Both V
T1
and V
T2
decrease below V
SLP
but above VIL. The device enters sleep mode.
The PWM ‘wakes up’ because one of the control inputs (V
T1
in this case) has risen above V
WAKE
. The startup timer is triggered, forcing OUT
high for 64 clock periods. (V
WAKE
= V
SLP
+ V
HYST
. See “Electrical Characteristics”).
Note G.
Following the startup interval, the PWM duty-cycle is the higher of V
T1
and V
T2
.
November 2006
4
M9999-112206
Micrel, Inc.
MIC502
V
OT
0.7V
DD
V
T1
V
T2
V
S L P
0.3V
DD
60%
40%
30%
PWM
Range
20%
0%
100%
V
IH
V
IL
0V
V
OTF
V
OH
V
O L
0V
H
t
S T A R T U P
I
L
M
V
OU T
V
OH
V
O L
0V
t
PW M
J
K
N
O
Output
Duty Cycle
100%
40%
60%
100%
30%
0%
V
DD
V
DD
0V
Figure 2. MIC502 Typical Power-Up System Behavior
Note H.
Note I.
Note J.
Note K.
Note L.
Note N.
At power-on, the startup timer forces OUT on for 64 PWM cycles of the internal timebase (t
PWM
). This insures that the fan will start from a dead
stop.
The PWM duty-cycle follows the higher of V
T1
and V
T2
, in the case, V
T1
.
The PWM duty-cycle follows V
T1
as it increases.
PWM duty-cycle is 100% (OUT constantly on) anytime V
T1
> V
PWM(max)
.
/OTF is asserted anytime V
T1
> V
OT
. (The fan continues to run at 100% duty-cycle).
Duty-cycle follows V
T1
until V
T1
< V
T2
, at which time V
T2
becomes the controlling input signal. Note that V
T1
is below V
SLP
but above V
IH
; so
normal operation continues. (Both V
T1
and V
T2
must be below V
SLP
to active sleep mode).
Note M.
/OTF is deasserted when V
T1
falls below V
OT
; duty-cycle once again follows V
T1
.
Note O.
All functions cease when V
T1
< V
IL
; this occurs regardless of the state of V
T2
.
November 2006
5
M9999-112206
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
