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IDT7134SA45JB

产品描述Dual-Port SRAM, 4KX8, 45ns, CMOS, PQCC52, PLASTIC, LCC-52
产品类别存储    存储   
文件大小110KB,共9页
制造商IDT (Integrated Device Technology)
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IDT7134SA45JB概述

Dual-Port SRAM, 4KX8, 45ns, CMOS, PQCC52, PLASTIC, LCC-52

IDT7134SA45JB规格参数

参数名称属性值
是否无铅含铅
是否Rohs认证不符合
厂商名称IDT (Integrated Device Technology)
零件包装代码LCC
包装说明QCCJ, LDCC52,.8SQ
针数52
Reach Compliance Codenot_compliant
ECCN代码3A001.A.2.C
最长访问时间45 ns
I/O 类型COMMON
JESD-30 代码S-PQCC-J52
JESD-609代码e0
长度19.1262 mm
内存密度32768 bit
内存集成电路类型DUAL-PORT SRAM
内存宽度8
湿度敏感等级1
功能数量1
端口数量2
端子数量52
字数4096 words
字数代码4000
工作模式ASYNCHRONOUS
最高工作温度125 °C
最低工作温度-55 °C
组织4KX8
输出特性3-STATE
封装主体材料PLASTIC/EPOXY
封装代码QCCJ
封装等效代码LDCC52,.8SQ
封装形状SQUARE
封装形式CHIP CARRIER
并行/串行PARALLEL
峰值回流温度(摄氏度)225
电源5 V
认证状态Not Qualified
座面最大高度4.57 mm
最大待机电流0.03 A
最小待机电流4.5 V
最大压摆率0.28 mA
最大供电电压 (Vsup)5.5 V
最小供电电压 (Vsup)4.5 V
标称供电电压 (Vsup)5 V
表面贴装YES
技术CMOS
温度等级MILITARY
端子面层Tin/Lead (Sn85Pb15)
端子形式J BEND
端子节距1.27 mm
端子位置QUAD
处于峰值回流温度下的最长时间30
宽度19.1262 mm

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HIGH-SPEED
4K x 8 DUAL-PORT
STATIC RAM
Integrated Device Technology, Inc.
IDT7134SA/LA
FEATURES:
• High-speed access
— Military: 25/35/45/55/70ns (max.)
— Commercial: 20/25/35/45/55/70ns (max.)
• Low-power operation
— IDT7134SA
Active: 500mW (typ.)
Standby: 5mW (typ.)
— IDT7134LA
Active: 500mW (typ.)
Standby: 1mW (typ.)
• Fully asynchronous operation from either port
• Battery backup operation—2V data retention
• TTL-compatible; single 5V (±10%) power supply
• Available in several popular hermetic and plastic packages
• Military product compliant to MIL-STD-883, Class B
• Industrial temperature range (–40°C to +85°C) is available,
tested to military electrical specifications
DESCRIPTION:
The IDT7134 is a high-speed 4K x 8 Dual-Port Static RAM
designed to be used in systems where on-chip hardware port
arbitration is not needed. This part lends itself to those
systems which cannot tolerate wait states or are designed to
be able to externally arbitrate or withstand contention when
both sides simultaneously access the same Dual-Port RAM
location.
The IDT7134 provides two independent ports with separate
control, address, and I/O pins that permit independent,
asynchronous access for reads or writes to any location in
memory. It is the user’s responsibility to ensure data integrity
when simultaneously accessing the same memory location
from both ports. An automatic power down feature, controlled
by
CE
, permits the on-chip circuitry of each port to enter a very
low standby power mode.
Fabricated using IDT’s CMOS high-performance
technology, these Dual-Port typically on only 500mW of
power. Low-power (LA) versions offer battery backup data
retention capability, with each port typically consuming 200µW
from a 2V battery.
The IDT7134 is packaged on either a sidebraze or plastic
48-pin DIP, 48-pin LCC, 52-pin PLCC and 48-pin Ceramic
Flatpack. Military grade product is manufactured in compliance
with the latest revision of MIL-STD-883, Class B, making it
ideally suited to military temperature applications demanding
the highest level of performance and reliability.
FUNCTIONAL BLOCK DIAGRAM
R/
W
L
R/
W
R
CE
L
CE
R
OE
L
I/O
0L
- I/O
7L
COLUMN
I/O
COLUMN
I/O
OE
R
I/O
0R
- I/O
7R
A
0L
- A
11L
LEFT SIDE
ADDRESS
DECODE
LOGIC
MEMORY
ARRAY
RIGHT SIDE
ADDRESS
DECODE
LOGIC
A
0R
- A
11R
2720 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1996 Integrated Device Technology, Inc.
For latest information contact IDT’s web site at www.idt.com or fax-on-demand at 408-492-8391.
OCTOBER 1996
DSC-2720/4
6.04
1

 
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