SN54F573, SN74F573
OCTAL TRANSPARENT D TYPE LATCHES
WITH 3 STATE OUTPUTS
•
•
•
•
•
Eight Latches in a Single Package
3-State Bus-Driving True Outputs
Full Parallel Access for Loading
Buffered Control Inputs
Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
SN54F573 . . . J PACKAGE
SN74F573 . . . DW OR N PACKAGE
(TOP VIEW)
SDFS011A − MARCH 1987 − REVISED OCTOBER 1993
description
These 8-bit latches feature 3-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. They are
particularly suitable for implementing buffer
registers, I/O ports, bidirectional bus drivers, and
working registers.
The eight latches of the
′F573
are transparent
D-type latches. While the latch enable (LE) input
is high, the Q outputs follow the data (D) inputs.
When the latch enable is taken low, the Q outputs
are latched at the logic levels set up at the D
inputs.
A buffered output enable (OE) input can be used
to place the eight outputs in either a normal logic
state (high or low logic levels) or a high-
impedance state. In the high-impedance state, the
outputs neither load nor drive the bus lines
significantly. The high-impedance state and
increased drive provide the capability to drive bus
lines without need for interface or pullup
components.
OE
1D
2D
3D
4D
5D
6D
7D
8D
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
LE
SN54F573 . . . FK PACKAGE
(TOP VIEW)
2D
1D
OE
V
CC
3D
4D
5D
6D
7D
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
1Q
2Q
3Q
4Q
5Q
6Q
The output enable (OE) input does not affect the internal operations of the latches. Old data can be retained
or new data can be entered while the outputs are in the high-impedance state.
The SN54F573 is characterized for operation over the full military temperature range of − 55°C to 125°C. The
SN74F573 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each latch)
INPUTS
OE
L
L
L
H
LE
H
H
L
X
D
H
L
X
X
OUTPUT
Q
H
L
Q0
Z
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
1993, Texas Instruments Incorporated
POST OFFICE BOX 655303
POST OFFICE BOX 1443
•
HOUSTON, TEXAS 77251−1443
•
DALLAS, TEXAS 75265
8D
GND
LE
8Q
7Q
2−1
SDFS011A − MARCH 1987 − REVISED OCTOBER 1993
SN54F573, SN74F573
OCTAL TRANSPARENT D TYPE LATCHES
WITH 3 STATE OUTPUTS
logic diagram (positive logic)
EN
C1
1D
19
18
17
16
15
14
13
12
LE
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
To Seven Other Channels
1D
2
C1
1D
19
1Q
OE
1
11
logic symbol
†
OE
LE
1D
2D
3D
4D
5D
6D
7D
8D
1
11
2
3
4
5
6
7
8
9
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
‡
Supply voltage range, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, V
I
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −1.2 V to 7 V
Input current range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −30 mA to 5 mA
Voltage range applied to any output in the disabled or power-off state . . . . . . . . . . . . . . . . . . . −0.5 V to 5.5 V
Voltage range applied to any output in the high state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V
CC
Current into any output in the low state: SN54F573 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 mA
SN74F573 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 mA
Operating free-air temperature range: SN54F573 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C
SN74F573 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input voltage ratings may be exceeded provided the input current ratings are observed.
recommended operating conditions
SN54F573
MIN
VCC
VIH
VIL
IIK
IOH
IOL
TA
Supply voltage
High-level input voltage
Low-level input voltage
Input clamp current
High-level output current
Low-level output current
Operating free-air temperature
−55
4.5
2
0.8
−18
−3
20
125
0
NOM
5
MAX
5.5
SN74F573
MIN
4.5
2
0.8
−18
−3
24
70
NOM
5
MAX
5.5
UNIT
V
V
V
mA
mA
mA
°C
2−2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
•
•
SN54F573, SN74F573
OCTAL TRANSPARENT D TYPE LATCHES
WITH 3 STATE OUTPUTS
SDFS011A − MARCH 1987 − REVISED OCTOBER 1993
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
VCC = 4.5 V,
VCC = 4.5 V
VCC = 4.75 V,
VOL
IOZH
IOZL
II
IIH
IIL
IOS‡
VCC = 4.5 V
VCC = 5.5 V,
VCC = 5.5 V,
VCC = 5.5 V,
VCC = 5.5 V,
VCC = 5.5 V,
VCC = 5.5 V,
TEST CONDITIONS
II = − 18 mA
IOH = − 1 mA
IOH = − 3 mA
IOH = − 1 mA to − 3 mA
IOL = 20 mA
IOL = 24 mA
VO = 2.7 V
VO = 0.5 V
VI = 7 V
VI = 2.7 V
VI = 0.5 V
VO = 0
−60
SN54F573
MIN TYP†
MAX
−1.2
2.5
2.4
3.4
3.3
0.3
0.5
0.35
50
−50
0.1
20
− 0.6
−150
−60
0.5
50
−50
0.1
20
− 0.6
−150
55
V
µA
µA
mA
µA
mA
mA
mA
2.5
2.4
2.7
3.4
3.3
V
SN74F573
MIN TYP†
MAX
−1.2
UNIT
V
ICCZ
VCC = 5.5 V,
See Note 2
38
55
38
† All typical values are at VCC = 5 V, TA = 25°C.
‡ Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
NOTE 2: ICCZ is measured with OE at 4.5 V and all other inputs grounded.
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
VCC = 5 V,
TA = 25°C
′F573
MIN
tw
tsu
th
Pulse duration, LE high
Setup time, data before LE↓
Hold time, data after LE↓
6
2
3
MAX
MIN
6
2
3
MAX
MIN
6
2
3
MAX
ns
ns
ns
SN54F573
SN74F573
UNIT
switching characteristics (see Note 3)
VCC = 5 V,
CL = 50 pF,
RL = 500
Ω,
TA = 25°C
′F573
MIN
tPLH
tPHL
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
D
LE
OE
OE
Q
Q
Q
Q
2
1.2
4.2
2.2
1.2
1.2
1.2
1.2
TYP
4.9
3.3
8.6
4.8
4.6
5.2
4.1
3.4
MAX
7
5
11.5
7
11
7.5
6.5
6
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
RL = 500
Ω,
TA = MIN to MAX§
SN54F573
MIN
1.5
1
3.7
1.5
1
1
1
1
MAX
9
8
13.5
9
13
10
8.5
7
SN74F573
MIN
2.2
1.2
4.2
2.2
1.2
1.2
1.2
1.2
MAX
8
6
13
8
12
8.5
7.5
6
ns
ns
ns
ns
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
UNIT
§ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
NOTE 3: Load circuits and waveforms are shown in Section 1.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
•
•
2−3
SDFS011A − MARCH 1987 − REVISED OCTOBER 1993
SN54F573, SN74F573
OCTAL TRANSPARENT D TYPE LATCHES
WITH 3 STATE OUTPUTS
2−4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
•
•
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