CMX605
Digital Line to
POTS Interface
D/605/6 July 2001
Provisional Issue
Features
•
Pre-Programmed Tone Generators
•
Fully Integrated DTMF Decoder/Encoder
•
SPM Generator
•
Simple Serial Control Interface
•
3.58MHz Xtal/Clock
•
V23/Bell 202 FSK Generator
•
Digital Ringing Voltage Generator
Applications
•
Digital Line to POTS Interface
•
Subscriber Terminal Adapters
•
Wireless Local Loop
•
Computer Telephony Integration
•
Telephone/Radio Patch Systems
•
Pair Gain Systems
•
Billing/SPM Systems
1.1
Brief Description
The CMX605 is an integrated telecom tone generator and DTMF encoder/decoder designed for ISDN
interfaces, Wireless Local Loop and Analogue to Digital Phone Conversion systems. The tone generator
covers an extensive range of pre-programmed tones used in analogue phone systems (POTS). Three
outputs are provided: ‘Ringing signals’, ‘In-band tones or FSK data’, and ‘12kHz/16kHz Metering pulses’.
Simple software control facilitates the interface to a wide range of commonly used µCs and SLICs,
enabling a comprehensive analogue telephone line presentation.
The DTMF encoder/decoder presents the digital line interface with DTMF dialling information received
from the telephone user and generates the appropriate DTMF tones for the POTS interface. DTMF tone
pairs can be encoded along with each tone singly or with other dual tone signals, such as those used in
CIDCW systems and ‘On Hook’ signalling systems.
Other tone standards supported are: Fax and Modem ‘answer’ and ‘originate’, ITU (CCITT) ‘R1’ and ‘R2’
signals, and sufficient tones for simple melody generation. Communication to and from the host
µController is performed by a ‘C-BUS’ serial interface, which is compatible with the ‘SPI’ interface.
©
2001 Consumer Microcircuits Limited
Digital Line to POTS Interface
CMX605
CONTENTS
Section
Page
1.1
1.2
1.3
1.4
1.5
Brief Description
............................................................................ 1
Block Diagram
................................................................................. 3
Signal List
......................................................................................... 4
External Components
................................................................... 6
General Description
...................................................................... 7
1.5.1
1.5.2
1.5.3
1.5.4
1.5.5
1.5.6
1.5.7
1.5.8
1.5.9
Xtal Osc and Clock Dividers...................................................
7
Uncommitted Amplifier...........................................................
7
Tone/FSK Encoder and Tone Encoder
.................................. 7
SPM Generator
...................................................................... 10
Transmit Operator.................................................................
10
Tx UART
................................................................................ 10
DTMF Tone Decoder
............................................................. 12
‘C-BUS’ Interface...................................................................
13
‘C-BUS’ Registers
................................................................. 14
1.6
Application Notes
........................................................................ 15
1.6.1
1.6.2
Telecom Tones ....................................................................... 15
C-BUS Timing......................................................................... 19
1.7
Performance Specification
....................................................... 22
1.7.1
1.7.2
Electrical Performance..........................................................
22
Packaging..............................................................................
26
©
2001 Consumer Microcircuits Limited
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D/605/6
Digital Line to POTS Interface
CMX605
1.2
Block Diagram
Figure 1 Block Diagram
©
2001 Consumer Microcircuits Limited
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D/605/6
Digital Line to POTS Interface
CMX605
1.3
Signal List
CMX605
D4/P3
Pin No.
1
Signal
Name
XTALN
Type
O/P
The output of the on-chip Xtal oscillator
inverter.
The input to the oscillator inverter from the
Xtal circuit or external clock source.
The ‘C-BUS’ serial clock input from the host
µC.
See section 1.5.8
The ‘C-BUS’ serial data input from the host
µC.
A 3-state ‘C-BUS’ serial data output to the
host
µC.
This output is high impedance when
not sending data to the host
µC.
The ‘C-BUS’ transfer control input provided by
the host
µC.
A ‘wire-ORable’ output for connection to a
host
µC
Interrupt Request input. This output is
pulled down to VSS when active and is high
impedance when inactive. An external pullup
resistor is required.
The negative supply rail (ground).
The sinewave output of the Tones and FSK
signal generators.
The sinewave output of the SPM signal
generator.
Description
2
XTAL/CLOCK
I/P
3
SERCK
I/P
4
COMDATA
I/P
5
REPDATA
T/S
6
CSN
I/P
7
IRQN
O/P
8
9
V
SS
TONEFSK
Power
O/P
10
SPM
O/P
©
2001 Consumer Microcircuits Limited
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D/605/6
Digital Line to POTS Interface
CMX605
CMX605
D4/P3
Pin No.
11
Signal
Description
Name
V
BIAS
Type
O/P
An internally generated bias voltage of V
DD
/2,
except when the device has been reset, V
BIAS
will discharge to V
SS.
It should be decoupled to
V
SS
by a capacitor mounted close to the device
pins.
The input to the DTMF decoder, internally
biased at V
DD
/2. It should be ac coupled.
The inverting input to the uncommitted
amplifier.
The output of the uncommitted amplifier.
The squarewave output of the Ringing Signal
generator.
The positive supply rail. Levels and thresholds
within the device are proportional to this
voltage. It should be decoupled to V
SS
by a
capacitor mounted close to the device pins.
12
RXIN
I/P
13
OPNIN
I/P
14
15
OPOUT
RING
O/P
O/P
16
V
DD
Power
Notes:
I/P
O/P
T/S
=
=
=
Input
Output
3-state Output
This device is capable of detecting and decoding small amplitude signals. To achieve this V
DD
and V
BIAS
decoupling and protecting the receive path from extraneous in-band signals are very
important. It is recommended that the printed circuit board is laid out with a ground plane in the
CMX605 area to provide a low impedance connection between the V
SS
pin and the V
DD
and
V
BIAS
decoupling capacitors.
©
2001 Consumer Microcircuits Limited
5
D/605/6
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