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CT1487M/CT1589M
OCTOBER 1991
3122-1.2
CT1487M/CT1589M
MIL-STD-1553 LOW POWER SINGLE AND DUAL TRANSCEIVERS
FEATURES
s
Available in
±15V
(CT1487M) and
±12
V (CT1589M)
versions
s
AC interstage coupling prevents static burnout
s
Receiver filtered to improve S/N ratio of system
s
Dissipates only 1.3 watt total at 25% transmitting
duty cycle (dual unit - 1.8 watts total). 100% duty
cycle permissible at 125°C case temperature
s
20 mV typical output offset
s
Meets MIL-STL-1553A/B
s
Available to Standard Military Drawings (see
Ordering Information)
s
24 pin double dip package or flat pack for single unit
s
36 pin double dip package or flat pack for
dual unit
s
TTL compatible
GENERAL DESCRIPTION
The CT1487M/CT1589M family of single and dual
transceivers is a second generation series incorporating
monolithic bipolar devices for improved reliability and
producibility. For thermal considerations, the drive stage
transistors are “off” the bipolar array. Input/output signals
are compatible with both MIL-STD-1553A and B systems.
DETAILED DESCRIPTION
RECEIVER DESCRIPTION
The Receiver section accepts bi-phase differential data
at the input and produces two TTL signals at the output.
The outputs are RX DATA OUT and RX DATA OUT and
represent positive and negative excursions, respectively,
of the input beyond a predetermined threshold. See Figure
2 for receiver logic waveforms.
The positive and negative thresholds are designed for
optimum word error rate. The receiver begins to detect
Data Bus signals (1 MHz, sinusoidal) that exceed 0.9 volt
nominal peak-to-peak when used with the specified
transformer. See Figure 4 for typical input/output
connections.
If the RECEIVER STROBE input is LOW, the RX DATA
OUT and RX DATA OUT are inhibited. If unused, a 2K-
ohm pullup to +5V is recommended.
Note: See ORDERING INFORMATION for units with
inverted outputs. (Pg 7)
Note: All data shown is for a single transceiver unless
otherwise noted. Dual transceivers are two completely
independent units in a common package.
Figure 1: Functional Diagram, CT1487M
1
CT1487M/CT1589M
DRIVER DESCRIPTION
The Driver section accepts complementary TTL data at
the input. When coupled to the Data Bus with the specified
transformer (isolated on the Data Bus side with 55-ohm
fault isolation resistors and loaded by two 70-ohm
terminations plus additional receivers), the Data Bus signal
produced is 6.8 volts nominal peak-to-peak (at point A,
Figure 4).
When both TX DATA IN and TX DATA IN inputs are
both held LOW or held HIGH, the driver output becomes a
high impedance and is removed from the line. In addition,
an overriding TX INHIBIT input takes priority over the
condition of the data inputs and disables the driver. See
Figure 3 for the driver logic waveforms.
TX DATA IN and TX DATA IN inputs must be
complementary waveforms of 50% average duty cycle and
with less than 15 ns skew between them.
CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS
Power supply voltage (V
cc
)
Power supply voltage (V
ee
)
Power supply voltage (V
ccl
)
Logic input voltage (RECEIVER STROBE,
INHIBIT, TX DATA IN, TX DATA IN)
Receiver differential input
(RX DATA IN, RX DATA IN)
Receiver input voltage (RX DATA IN or
RX DATA IN)
Driver output current (TX DATA OUT or
TD DATA OUT)
Transmission duty cycle at T
c
= 125°C
Operating case temperature range (T
c
)
CT1487
−0.3
to +18.0V
+0.3 to
−18.0V
−0.3
to +7.0V
−0.3
to +5.5V
±
20 V (40 V p-p)
±
15 V
+200 mA
100%
−55
to +125°C
CT1589
−0.3
to + 18.0V
+0.3 to
−18.0V
−0.3
to +7.0V
−0.3
to +5.5V
±
20 V (40 V p-p)
±
15 V
+300 mA
100%
−55
to +125°C
POWER AND THERMAL DATA, TOTAL HYBRID (DRIVER AND RECEIVER)
CT1487M
PARAMETER/CONDITION
Power supply voltages
SYMBOL
V
cc
V
ee
V
ccl
P
c
MIN
14.25
-14.25
4.5
Note 1
TYP
15
-15
5
350
MAX
15.75
-15.75
5.5
500
MIN
11.4
-11.4
4.5
Note1
CT1589M
TYP
12
-12
5
350
MAX
12.6
-12.6
5.5
500
UNIT
V
V
V
mW
Power dissipation of most critical
(hottest) device in hybrid during
continuous transmission
(100% duty cycle)
Thermal resistance, most critical device
Junction to case temperature rise of
most critical device at 100% duty
cycle transmission
Total supply current “standby” mode, or
transmitting at less than 1% duty cycle
(e.g. 20
µs
of transmission every 2ms
or longer interval)
Total supply current transmitting
at 1MHz into a
DUTY CYCLE
35-ohm load at
point A in Figure 4
25%
100%
Ø
jc
T
jc
50
25
50
25
°C/W
°C
I
cc
I
ee
I
ccl
Note 2
Note 2
S*
15
25
32
D*
30
50
64
S*
22
35
45
D*
44
70
90
Note 2
Note 2
S*
15
25
32
D*
30
50
64
S*
22
35
45
D*
44
70
90
mA
mA
mA
I
cc
25
I
cc
100
Note 3
55 70
75 100
Note 3
70 85
95 120
mA
mA
Note 3 185 200 235 260 Note 3
224 240 290 315
* S = single unit, D = dual unit (one unit transmitting)
Notes:
1. Decreases linearly to zero at zero duty cycle.
2. I
ee
and I
ccl
limits do not change with mode of operation or duty cycle.
3. Decreases linearly to applicable “standby” value at zero duty cycle.
2
CT1487M/CT1589M
ELECTRICAL CHARACTERISTICS, RECEIVER SECTION
(See Figure 2)
PARAMETER/CONDITION
INPUT CHARACTERISTICS
Differential input impedance DC to 1MHz
Differential voltage range
Input common mode voltage range
Common mode rejection ratio (from point A, Figure 4)
STROBE characteristics
(Logic "0" inhibits output)
"0" input current (vs = 0.4 V)
"1" input current (Vs = 2.7 V)
"0" input voltage
"1" input voltage
Threshold characteristics (sine wave at 1MHz)
NOTE: Threshold voltages refer to point A, Figure 4.
Filter characteristics
(sine wave input)
OUTPUT CHARACTERISTICS
"1" state (l
source
= 400
µA)
"0" state (l
sink
= 4 mA)
NOTE: With receiver input below threshold both RX DATA
OUT and RX DATA OUT remain in "0" state.
Delay (average) from differential input zero crossings to
RX DATA OUT and RX DATA OUT output 50% points
V
oh
V
oh
2.5
3.4
0.5
2 MHz
3 MHz
l
il
l
il
V
il
V
ih
V
th1
2
0.8
1.1
-1
40
0.7
mA
µA
V
V
V
p-p
Z
in
V
idr
V
icr
CMRR
9K
±
20V
±
10V
40
ohms
V
peak
V
peak
dB
SYMBOL
MIN
TYP
MAX
UNIT
V
th2
V
th3
1.5
5
8
V
p-p
V
p-p
t
DRX
340
450
ns
Figure 2: Receiver Logic Waveforms (for Inverted Data Output, see Ordering Information)
3
CT1487M/CT1589M
ELECTRICAL CHARACTERISTICS, DRIVER SECTION
(See Figure 3)
PARAMETER/CONDITION
INPUT CHARACTERISTICS
"0" input current (V
in
= 0.4 V)
"1" input current (V
in
= 2.7 V)
"0" input voltage
"1" input voltage
Delay from TX INHIBIT (0
→
1) to inhibited
output impedance
Delay from TX INHIBIT (1
→
0) to active
output impedance
Differential output noise
Differential output impedance (inhibited) at 1 MHz
OUTPUT CHARACTERISTICS
Differential output level at point B, Figure 4 (145-ohm load)
Rise and fall times (10%–90% of p-p output)
Output offset at point A in Figure 4 (35-ohm load)
2.5
µs
after mid-bit crossing of parity bit of last word
of a 660
µs
message
Delay from 50% point of TX DATA IN or TX DATA IN
to zero crossing of differential output
V
o
t
r
V
os
26
100
28
160
±20
35
300
±75
V
p-p
ns
mV peak
l
il
l
ih
V
il
V
ih
t
DXOFF
t
DXON
V
noi
Z
oi
8K
2
150
100
225
150
10
−1
80
0.7
mA
µA
V
V
ns
ns
mV
p-p
ohms
SYMBOL
MIN
TYP
MAX
UNIT
t
DTX
100
200
ns
Figure 3: Driver Logic Waveforms
4
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