The documentation and process conversion
measures necessary to comply with this revision
shall be completed by 9 February 2011.
INCH-POUND
MIL-PRF-19500/713B
9 November 2010
SUPERSEDING
MIL-PRF-19500/713A
4 June 2007
PERFORMANCE SPECIFICATION SHEET
SEMICONDUCTOR DEVICE, FIELD EFFECT RADIATION HARDENED
(TOTAL DOSE AND SINGLE EVENT EFFECTS)
TRANSISTORS, P-CHANNEL, SILICON, TYPES 2N7549T1, 2N7549U2, 2N7550T1, AND 2N7550U2,
JANTXVR, F AND JANSR, F
This specification is approved for use by all Departments
and Agencies of the Department of Defense.
The requirements for acquiring the product described herein shall consist of
this specification sheet and MIL-PRF-19500.
1. SCOPE
1.1 Scope. This specification covers the performance requirements for a P-channel, enhancement-mode,
MOSFET, radiation hardened (total dose and single event effects (SEE)), power transistor. Two levels of product
assurance are provided for each device type as specified in MIL-PRF-19500, with avalanche energy maximum rating
(EAS) and maximum avalanche current (IAS). See 6.5 for JANHC and JANKC die versions.
1.2 Physical dimensions. See figure 1, TO-254AA (T1) and figure 2, SMD2 TO-276AC (U2).
*
1.3 Maximum ratings. Unless otherwise specified, TA = +25°C.
Type
PT (1)
PT
R
θJC
(2)
VDS
VDG
VGS
ID1 (3) ID2 (3) (4)
(4)
TC =
TC =
+100°C
+25°C
A dc
-45
-47
-30
-33.5
A dc
-28.5
-30
-19
-21
IS
IDM
(5)
TJ
and
TSTG
VISO
70,000
foot
altitude
V dc
100
100
200
200
TC = +25°C TA = +25°C
(free air)
W
2N7550T1
2N7550U2
2N7549T1
2N7549U2
208
250
208
250
W
2.6
1.6
2.6
1.6
°C/W
0.60
0.50
0.60
0.50
V dc
-100
-100
-200
-200
V dc
-100
-100
-200
-200
V dc
±20
±20
±20
±20
A dc
-45
-47
-30
-33.5
A(pk)
-180
-188
-120
-134
°C
-55
to
+150
(1) Derate linearly by 2.0 W/°C (U2) or 1.67 W/°C (T1) for
TC >
+25°C.
(2) See figure 3, thermal impedance curves.
(3) The following formula derives the maximum theoretical I
D
limit. I
D
is limited by package design and device
construction, to 45 A for T1 or limited to 56 A for U2:
T
JM
- T
C
I
D
=
(
R
θ
JC
)
x
(
R
DS
( on ) at T
JM
)
(4) See figure 4, maximum drain current graph.
(5) IDM = 4 X ID1, as defined in note (3).
* Comments, suggestions, or questions on this document should be addressed to DLA Land and Maritime,
ATTN: VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to
Semiconductor@dscc.dla.mil.
Since
contact information can change, you may want to verify the currency of this address information using the
ASSIST Online database at
https://assist.daps.dla.mil/.
AMSC N/A
FSC 5961
MIL-PRF-19500/713B
Dimensions
Ltr
Inches
Min
BL
CH
LD
LL
LO
LS
MHD
MHO
TL
TT
TW
Term 1
Term 2
Term 3
.535
.249
.035
.510
Max
.545
.260
.045
.570
Millimeters
Min
13.59
6.33
0.89
12.95
Max
13.84
6.60
1.14
14.48
3
Notes
.150 BSC
.150 BSC
.139
.665
.790
.040
.535
.149
.685
.800
.050
.545
3.81 BSC
3.81 BSC
3.53
16.89
20.07
1.02
13.59
Drain
Source
Gate
3.79
17.40
20.32
1.27
13.84
4
4
NOTES:
1. Dimensions are in inches.
2. Millimeters are given for general information only.
3. Protrusion thickness of ceramic eyelets included in dimension LL.
4. All terminals are isolated from case.
5. In accordance with ASME Y14.5M, diameters are equivalent to
φx
symbology.
* FIGURE 1. Physical dimensions for TO-254AA (2N7549T1 and 2N7550T1).
2
MIL-PRF-19500/713B
0.10 (0.004)
-A-
BW
CH
-C-
3 SURFACES
LW1
1
CL
LL1
BL
-B-
Q1 (2X)
LW2
(2X)
CL
CL
LL2
(2X)
3
2
Q2
LH
(3X)
LS2
0.36 (0.014) M
LS1
C
A M
B M
Symbol
Inches
BL
BW
CH
LH
LW1
LW2
LL1
LL2
LS1
LS2
Q1
Q2
TERM 1
TERM 2
TERM 3
Min
.685
.520
.010
.435
.135
.470
.152
.240 BSC
.120 BSC
.035
.050
Dimensions
Millimeters
Max
.695
.530
.142
.020
.445
.145
.480
.162
Min
17.40
13.21
0.25
11.05
3.43
11.94
3.86
6.10 BSC
3.05 BSC
0.89
1.27
Drain
Gate
Source
Max
17.65
13.46
3.61
0.51
11.30
3.68
12.19
4.12
*
*
NOTES:
1.
Dimensions are in inches.
2.
Millimeters are given for general information only.
3.
In accordance with ASME Y14.5M, diameters are equivalent to
φx
symbology.
4.
Terminal 1 – Drain, Terminal 2 – Gate, Terminal 3 – Source.
* FIGURE 2. Physical dimensions for SMD2 TO-276AC (2N7550U2 and 2N7549U2).
3
MIL-PRF-19500/713B
1.4 Primary electrical characteristics. Unless otherwise specified, T
C
= +25°C.
Type
Min
V(BR)DSS
VGS = 0
ID = 1.0
mA dc
V dc
Min
2N7550T1
2N7550U2
2N7549T1
2N7549U2
-100
-100
-200
-200
-2.0
-2.0
-2.0
-2.0
VGS(TH)
VDS
≥
VGS
ID = 1.0
mA dc
V dc
Max
-4.0
-4.0
-4.0
-4.0
-10
-10
-10
-10
0.050
0.049
0.103
0.102
0.103
0.113
0.232
0.224
480
400
332
303
-45
-47
-30
-33.5
Max I
DSS1
VGS = 0
VDS = 80
percent of
rated VDS
µA
dc
Max r
DS(ON)
(1)
VGS = 12 V dc
TJ = +25°C
at ID2
ohm
TJ = +150°C
at ID2
ohm
EAS
at ID1
IAS
mJ
A
(1) Pulsed (see 4.5.1).
2. APPLICABLE DOCUMENTS
2.1 General. The documents listed in this section are specified in sections 3, 4, or 5 of this specification. This
section does not include documents cited in other sections of this specification or recommended for additional
information or as examples. While every effort has been made to ensure the completeness of this list, document
users are cautioned that they must meet all specified requirements of documents cited in sections 3, 4, or 5 of this
specification, whether or not they are listed.
2.2 Government documents.
2.2.1 Specifications, standards, and handbooks. The following specifications, standards, and handbooks form a
part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are
those cited in the solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATIONS
MIL-PRF-19500
-
Semiconductor Devices, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-750
-
Test Methods for Semiconductor Devices.
* (Copies of these documents are available online at
https://assist.daps.dla.mil/quicksearch/
or
https://assist.daps.dla.mil/
or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D,
Philadelphia, PA 19111-5094.)
* 2.3 Order of precedence. Unless otherwise noted herein or in the contract, in the event of a conflict between the
text of this document and the references cited herein, the text of this document takes precedence. Nothing in this
document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained.
4
MIL-PRF-19500/713B
3. REQUIREMENTS
3.1 General. The individual item requirements shall be as specified in MIL-PRF-19500 and as modified herein.
3.2 Qualification. Devices furnished under this specification shall be products that are manufactured by a
manufacturer authorized by the qualifying activity for listing on the applicable qualified manufacturer's list (QML)
before contract award (see 4.2 and 6.3).
3.3 Abbreviations, symbols, and definitions. Abbreviations, symbols, and definitions used herein shall be as
specified in MIL-PRF-19500.
3.4 Interface and physical dimensions. The interface and physical dimensions shall be as specified in
MIL-PRF-19500 and on figures 1 (T1, TO-254AA) and 2 (U2, surface mount TO-276AC) herein.
3.4.1 Lead finish. Lead finish shall be solderable in accordance with MIL-PRF-19500, MIL-STD-750, and herein.
Where a choice of lead finish is desired, it shall be specified in the acquisition document (see 6.2).
3.4.2 Internal construction. Multiple chip construction shall not be permitted to meet the requirements of this
specification.
3.5 Electrostatic discharge protection. The devices covered by this specification require electrostatic discharge
protection.
3.5.1 Handling. MOS devices shall be handled with certain precautions to avoid damage due to the accumulation
of static charge. However, the following handling practices are recommended (see 3.5).
a.
b.
c.
d.
e.
f.
g.
Devices should be handled on benches with conductive handling devices.
Ground test equipment, tools, and personnel handling devices.
Do not handle devices by the leads.
Store devices in conductive foam or carriers.
Avoid use of plastic, rubber, or silk in MOS areas.
Maintain relative humidity above 50 percent if practical.
Care should be exercised during test and troubleshooting to apply not more than maximum rated voltage to
any lead.
Gate shall be terminated to source, R
≤
100 kΩ, whenever bias voltage is to be applied drain to source.
h.
3.6 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance
characteristics are as specified in 1.3, 1.4, and table I herein.
3.7 Electrical test requirements. The electrical test requirements shall be as specified in table I.
3.8 Marking. Marking shall be in accordance with MIL-PRF-19500. At the option of the manufacturer, marking
may be omitted from the body, but shall be retained on the initial container.
3.9 Workmanship. Semiconductor devices shall be processed in such a manner as to be uniform in quality and
shall be free from other defects that will affect life, serviceability, or appearance.
5
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