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SN74AS280N3

产品描述Parity Generator/Checker, AS Series, 9-Bit, Complementary Output, TTL, PDIP14, 0.300 INCH, PLASTIC, DIP-14
产品类别逻辑    逻辑   
文件大小895KB,共15页
制造商Rochester Electronics
官网地址https://www.rocelec.com/
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SN74AS280N3概述

Parity Generator/Checker, AS Series, 9-Bit, Complementary Output, TTL, PDIP14, 0.300 INCH, PLASTIC, DIP-14

SN74AS280N3规格参数

参数名称属性值
厂商名称Rochester Electronics
包装说明DIP,
Reach Compliance Codeunknown
其他特性ODD/EVEN PARITY GENERATOR
系列AS
JESD-30 代码R-PDIP-T14
长度19.305 mm
逻辑集成电路类型PARITY GENERATOR/CHECKER
位数9
功能数量1
端子数量14
最高工作温度70 °C
最低工作温度
输出特性3-STATE
输出极性COMPLEMENTARY
封装主体材料PLASTIC/EPOXY
封装代码DIP
封装形状RECTANGULAR
封装形式IN-LINE
传播延迟(tpd)12 ns
座面最大高度5.08 mm
最大供电电压 (Vsup)5.5 V
最小供电电压 (Vsup)4.5 V
标称供电电压 (Vsup)5 V
表面贴装NO
技术TTL
温度等级COMMERCIAL
端子形式THROUGH-HOLE
端子节距2.54 mm
端子位置DUAL
宽度7.62 mm

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SN74ALS280, SN74AS280
9 BIT PARITY GENERATORS/CHECKERS
SDAS038C − DECEMBER 1982 − REVISED DECEMBER 1994
Generate Either Odd or Even Parity for Nine
Data Lines
Cascadable for n-Bit Parity
Can Be Used to Upgrade Existing Systems
Using MSI Parity Circuits
Package Options Include Plastic
Small-Outline (D) Packages and Standard
Plastic (N) 300-mil DIPs
D OR N PACKAGE
(TOP VIEW)
description
G
H
NC
I
Σ
EVEN
Σ
ODD
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
F
E
D
C
B
A
NC − No internal connection
These universal 9-bit parity generators/checkers
utilize advanced Schottky high-performance
circuitry and feature odd (Σ ODD) and even (Σ EVEN) outputs to facilitate operation of either odd- or even-parity
applications. The word-length capability is easily expanded by cascading.
These devices can be used to upgrade the performance of most systems utilizing the SN74ALS180 and
SN74AS180 parity generators/checkers. Although the SN74ALS280 and SN74AS280 are implemented without
expander inputs, the corresponding function is provided by the availability of an input (I) at terminal 4 and the
absence of any internal connection at terminal 3. This permits the SN74ALS280 and SN74AS280 to be
substituted for the SN74ALS180 and SN74AS180 in existing designs to produce an identical function even if
the devices are mixed with existing SN74ALS180 and SN74AS180 devices.
All SN74AS280 inputs are buffered to lower the drive requirements.
The SN74ALS280 and SN74AS280 are characterized for operation from 0°C to 70°C.
FUNCTION TABLE
NO. OF INPUTS
A −I
THAT ARE HIGH
0, 2, 4, 6, 8
1, 3, 5, 7, 9
OUTPUTS
Σ
EVEN
H
L
Σ
ODD
L
H
logic symbol
8
9
10
11
12
13
1
2
4
6
Σ
ODD
5
Σ
EVEN
2k
A
B
C
D
E
F
G
H
I
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
1994, Texas Instruments Incorporated
POST OFFICE BOX 655303
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251−1443
DALLAS, TEXAS 75265
1

 
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