FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
December 2009
FODM8071
3.3V/5V Logic Gate Output Optocoupler with
High Noise Immunity
Features
■
High noise immunity characterized by common mode
Description
The FODM8071 is a 3.3V/5V high-speed logic gate
output Optocoupler, which supports isolated communi-
cations allowing digital signals to communicate between
systems without conducting ground loops or hazardous
voltages. It utilizes Fairchild’s patented coplanar packag-
ing technology, Optoplanar
®
, and optimized IC design to
achieve high noise immunity, characterized by high com-
mon mode rejection specifications.
This high-speed logic gate output optocoupler, housed in
a compact 5-Pin Mini-Flat package, consists of a high-
speed AlGaAs LED at the input coupled to a CMOS
detector IC at the output. The detector IC comprises an
integrated photodiode, a high-speed transimpedance
amplifier and a voltage comparator with an output driver.
The CMOS technology coupled with a high efficiency
LED achieves low power consumption as well as very
high speed (55ns propagation delay, 20ns pulse width
distortion).
rejection
– 20kV/µs minimum common mode rejection
■
High speed
– 20Mbit/sec date rate (NRZ)
– 55ns max. propagation delay
– 20ns max. pulse width distortion
– 30ns max. propagation delay skew
■
3.3V and 5V CMOS compatibility
■
Specifications guaranteed over 3V to 5.5V supply
voltage and -40°C to +110°C temperature range
■
Safety and regulatory approvals
– UL1577, 3750 VAC
RMS
for 1 min.
– IEC60747-5-2 (pending)
Applications
■
Microprocessor system interface
■
■
■
■
– SPI, I
2
C
Industrial fieldbus communications
– DeviceNet, CAN, RS485
Programmable logic control
Isolated data acquisition system
Voltage level translator
Related Resources
■
www.fairchildsemi.com/products/opto/
■
www.fairchildsemi.com/pf/FO/FOD8001.html
■
www.fairchildsemi.com/pf/FO/FOD0721.html
Functional Schematic
Truth Table
ANODE 1
6 V
DD
LED
Off
On
Output
High
Low
5 V
O
CATHODE 3
4 GND
©2008 Fairchild Semiconductor Corporation
FODM8071 Rev. 1.0.6
www.fairchildsemi.com
FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Pin Definitions
Number
1
3
4
5
6
Name
ANODE
CATHODE
GND
V
O
V
DD
Anode
Cathode
Output Ground
Output Voltage
Output Supply Voltage
Function Description
Safety and Insulation Ratings for Mini-Flat Package (SO5 Pin)
As per IEC60747-5-2 (Pending Certification). This optocoupler is suitable for “safe electrical insulation” only within the
safety limit data. Compliance with the safety ratings shall be ensured by means of protective circuits.
Symbol
Parameter
Installation Classifications per DIN VDE 0110/1.89 Table 1
For rated main voltage < 150Vrms
For rated main voltage < 300Vrms
Climatic Classification
Pollution Degree (DIN VDE 0110/1.89)
Min.
Typ.
I-IV
I-III
40/110/21
2
Max.
Unit
CTI
V
PR
Comparative Tracking Index
Input to Output Test Voltage, Method b,
VIORM x 1.875 = V
PR
, 100% Production Test with
t
m
= 1 sec, Partial Discharge < 5 pC
Input to Output Test Voltage, Method a,
VIORM x 1.5 = V
PR
, Type and Sample Test with
t
m
= 60 sec, Partial Discharge < 5 pC
Max Working Insulation Voltage
Highest Allowable Over Voltage
External Creepage
External Clearance
Insulation Thickness
175
1060
V
V
PR
848
V
V
IORM
V
IOTM
565
4000
5.0
5.0
0.5
150
10
9
V
peak
V
peak
mm
mm
mm
°
C
Ω
T
Case
R
IO
Safety Limit Values, Maximum Values allowed in the event
of a failure, Case Temperature
Insulation Resistance at T
STG
,V
IO
= 500V
©2008 Fairchild Semiconductor Corporation
FODM8071 Rev. 1.0.6
www.fairchildsemi.com
2
FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Absolute Maximum Ratings
(T
A
= 25ºC unless otherwise specified)
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only. .
Symbol
T
STG
T
OPR
T
J
T
SOL
I
F
V
R
V
DD
V
O
I
O
PD
I
PD
O
Parameter
Storage Temperature
Operating Temperature
Junction Temperature
Lead Solder Temperature (Refer to Reflow
Temperature Profile)
Forward Current
Reverse Voltage
Supply Voltage
Output Voltage
Average Output Current
Input Power Dissipation
(1)(3)
Output Power Dissipation
(2)(3)
Value
-40 to +125
-40 to +110
-40 to +125
260 for 10sec
20
5
0 to 6.0
-0.5 to V
DD
+0.5
10
40
70
Units
ºC
ºC
ºC
ºC
mA
V
V
V
mA
mW
mW
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
T
A
V
DD
V
FL
I
FH
I
OL
Parameter
Ambient Operating Temperature
Supply Voltages
(4)
Logic Low Input Voltage
Logic High Input Current
Logic Low Output Current
Min.
-40
3.0
0
5
0
Max.
+110
5.5
0.8
16
7
Unit
ºC
V
V
mA
mA
Isolation Characteristics
(Apply over all recommended conditions, typical value is measured at T
A
= 25ºC)
Symbol
V
ISO
R
ISO
C
ISO
Parameter
Conditions
Min.
3750
10
11
Typ.
Max.
Units
Vac
RMS
Ω
Input-Output Isolation Voltage freq = 60Hz, t = 1.0min,
I
I-O
≤
10µA
(5)(6)
Isolation Resistance
Isolation Capacitance
V
I-O
= 500V
(5)
V
I-O
= 0V, freq = 1.0MHz
(5)
0.2
pF
Notes:
1.
Derate linearly from 95˚C at a rate of -1.4mW/˚C
2.
Derate linearly from 100˚C at a rate of -3.47mW/˚C.
3.
Functional operation under these conditions is not implied. Permanent damage may occur if the device is subjected
to conditions outside these ratings.
4. 0.1µF bypass capacitor must be connected between 4 and 6.
5. Device is considered a two terminal device: Pins 1, and 3 are shorted together and Pins 4, 5, and 6 are shorted
together.
6. 3,750 VAC
RMS
for 1 minute duration is equivalent to 4,500 VAC
RMS
for 1 second duration.
©2008 Fairchild Semiconductor Corporation
FODM8071 Rev. 1.0.6
www.fairchildsemi.com
3
FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Electrical Characteristics
(Apply over all recommended conditions)
(T
A
= -40ºC to +110ºC, 3.0V
≤
V
DD
≤
5.5V), unless otherwise specified.
Typical value is measured at T
A
= 25ºC and V
DD
= 3.3V.
Symbol
V
F
BV
R
I
FHL
I
DDL
I
DDH
V
OH
Parameter
Forward Voltage
Input Reverse Breakdown
Voltage
Threshold Input Current
Logic Low Output Supply
Current
Logic High Output Supply
Current
Logic High Output Voltage
Test Conditions
I
F
= 10mA, Fig. 1
I
R
= 10µA
Fig. 2
V
DD
= 3.3V, I
F
= 10mA, Fig. 3, 5
V
DD
= 5.0V, I
F
= 10mA, Fig. 3, 6
V
DD
= 3.3V, I
F
= 0mA, Fig. 4
V
DD
= 5.0V, I
F
= 0mA, Fig. 4
V
DD
= 3.3V, I
O
= -20µA, I
F
= 0mA
V
DD
= 3.3V, I
O
= -4mA, I
F
= 0mA
V
DD
= 5.0V, I
O
= -20µA, I
F
= 0mA
V
DD
= 5.0V, I
O
= -4mA, I
F
= 0mA
Min.
1.05
5
Typ.
1.35
15
2.8
3.3
4.0
3.3
4.0
Max.
1.8
Units
V
V
INPUT CHARACTERISTICS
5
4.8
5.0
4.8
5.0
mA
mA
mA
mA
mA
V
V
V
V
OUTPUT CHARACTERISTICS
V
DD
– 0.1V
V
DD
– 0.5V
V
DD
– 0.1V
V
DD
– 0.5V
3.3
3.1
5.0
4.9
0.0027
0.27
0.01
0.8
V
OL
Logic Low Output Voltage
I
O
= 20µA, I
F
= 10mA
I
O
= 4mA, I
F
= 10mA
V
V
©2008 Fairchild Semiconductor Corporation
FODM8071 Rev. 1.0.6
www.fairchildsemi.com
4
FODM8071 — 3.3V/5V Logic Gate Output Optocoupler with High Noise Immunity
Switching Characteristics
(Apply over all recommended conditions)
(T
A
= -40ºC to +110ºC, 3.0V
≤
V
DD
≤
5.5V, I
F
= 5mA), unless otherwise specified.
Typical value is measured at T
A
= 25ºC and V
DD
= 3.3V
Symbol
Date Rate
(7)
t
PW
t
PHL
t
PLH
PWD
t
PSK
t
R
t
F
| CM
H
|
Parameter
Pulse Width
Propagation Delay Time
to Logic Low Output
Propagation Delay Time
to Logic High Output
Pulse Width Distortion,
| t
PHL
- t
PLH
|
Propagation Delay Skew
Output Rise Time
(10% to 90%)
Output Fall Time
(90% to 10%)
Common Mode Transient
Immunity at Output High
Common Mode Transient
Immunity at Output Low
Output Dynamic Power
Dissipation
Capacitance
(10)
Test Conditions
Min.
50
Typ.
Max.
20
Units
Mbps
ns
ns
ns
ns
ns
ns
ns
kV/µs
C
L
= 15pF, Fig. 7, 8, 12
C
L
= 15pF, Fig. 7, 8, 12
C
L
= 15pF, Fig. 9, 10
C
L
= 15pF
(8)
Fig. 11, 12
Fig. 11, 12
I
F
= 0mA, V
O
> 0.8V
DD
,
V
CM
= 1000V, T
A
= 25ºC,
Fig. 13
(9)
I
F
= 5mA, V
O
< 0.8V,
V
CM
= 1000V, T
A
= 25ºC,
Fig. 13
(9)
20
31
25
5.5
55
55
20
30
5.8
5.3
40
| CM
L
|
20
40
kV/µs
C
PDO
4
pF
Notes:
7. Data rate is based on 10MHz, 50% NRZ pattern with a 50nsec minimum bit time.
8. t
PSK
is equal to the magnitude of the worst case difference in t
PHL
and/or t
PLH
that will be seen between any two units
from the same manufacturing date code that are operated at same case temperature (±5°C), at same operating
conditions, with equal loads (R
L
= 350Ω and C
L
= 15pF), and with an input rise time less than 5ns.
9. Common mode transient immunity at output high is the maximum tolerable positive dVcm/dt on the leading edge of
the common mode impulse signal, Vcm, to assure that the output will remain high. Common mode transient immunity
at output low is the maximum tolerable negative dVcm/dt on the trailing edge of the common pulse signal, Vcm,
to assure that the output will remain low.
10.Unloaded dynamic power dissipation is calculated as follows: C
PD
x V
DD
x
f
+ I
DD
+ V
PD
where
f
is switched
time in MHz.
©2008 Fairchild Semiconductor Corporation
FODM8071 Rev. 1.0.6
www.fairchildsemi.com
5
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