A4982
DMOS Microstepping Driver with Translator
And Overcurrent Protection
Features and Benefits
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Low R
DS(ON)
outputs
Automatic current decay mode detection/selection
Mixed and Slow current decay modes
Synchronous rectification for low power dissipation
Internal UVLO
Crossover-current protection
3.3 and 5 V compatible logic supply
Thin profile QFN and TSSOP packages
Thermal shutdown circuitry
Short-to-ground protection
Shorted load protection
Low current Sleep mode, < 10 µA
No smoke no fire (NSNF) compliance (ET package)
32-contact QFN
The A4982 is a complete microstepping motor driver with
built-in translator for easy operation. It is designed to operate
bipolar stepper motors in full-, half-, quarter-, and sixteenth-step
modes, with an output drive capacity of up to 35 V and ±2 A.
The A4982 includes a fixed off-time current regulator which
has the ability to operate in Slow or Mixed decay modes.
The ET package meets customer requirements for no smoke
no fire (NSNF) designs by adding no-connect pins between
critical output, sense, and supply pins. So, in the case of a
pin-to-adjacent-pin short, the device does not cause smoke
or fire. Additionally, the device does not cause smoke or fire
when any pin is shorted to ground or left open.
The translator is the key to the easy implementation of the
A4982. Simply inputting one pulse on the STEP input drives
the motor one microstep. There are no phase sequence tables,
high frequency control lines, or complex interfaces to program.
The A4982 interface is an ideal fit for applications where a
complex microprocessor is unavailable or is overburdened.
During stepping operation, the chopping control in the A4982
automatically selects the current decay mode, Slow or Mixed.
In Mixed decay mode, the device is set initially to a fast decay
for a proportion of the fixed off-time, then to a slow decay for
the remainder of the off-time. Mixed decay current control
Description
Packages
:
with exposed thermal pad
5 mm × 5 mm × 0.90 mm
(ET package)
Approximate size
24-pin TSSOP
with exposed thermal pad
(LP Package)
Continued on the next page…
Typical Application Diagram
V
DD
0.22 µF
VREG ROSC
VDD
5 kΩ
Microcontroller or
Controller Logic
SLEEP
STEP
MS1
MS2
DIR
ENABLE
RESET
VREF
GND
GND
OUT2A
OUT2B
SENSE2
0.1 µF
0.1 µF
0.22 µF
CP1
CP2
VCP
VBB1
VBB2
OUT1A
100 µF
A4982
OUT1B
SENSE1
4982-DS Rev. 5
A4982
DMOS Microstepping Driver with Translator
And Overcurrent Protection
Description (continued)
results in reduced audible motor noise, increased step accuracy,
and reduced power dissipation.
Internal synchronous rectification control circuitry is provided
to improve power dissipation during PWM operation. Internal
circuit protection includes: thermal shutdown with hysteresis,
undervoltage lockout (UVLO), and crossover-current protection.
Special power-on sequencing is not required.
The A4982 is supplied in two surface mount package, the ET, a
5 mm × 5 mm, 0.90 mm nominal overall package height QFN
package, and the LP package, a 24-pin TSSOP. Both packages have
exposed pads for enhanced thermal dissipation, and are lead (Pb)
free (suffix –T), with 100% matte tin plated leadframes.
Selection Guide
Part Number
A4982SETTR-T
A4982SLPTR-T
Package
32-pin QFN with exposed thermal pad
24-pin TSSOP with exposed thermal pad
Packing
1500 pieces per 7-in. reel
4000 pieces per 13-in. reel
Absolute Maximum Ratings
Characteristic
Load Supply Voltage
Output Current
Logic Input Voltage
Logic Supply Voltage
Motor Outputs Voltage
Sense Voltage
Reference Voltage
Operating Ambient Temperature
Maximum Junction
Storage Temperature
V
SENSE
V
REF
T
A
T
J
(max)
T
stg
Range S
Symbol
V
BB
I
OUT
V
IN
V
DD
Notes
Rating
35
±2
–0.3 to 5.5
–0.3 to 5.5
–2.0 to 37
–0.5 to 0.5
5.5
–20 to 85
150
–55 to 150
Units
V
A
V
V
V
V
V
ºC
ºC
ºC
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2
A4982
DMOS Microstepping Driver with Translator
And Overcurrent Protection
Functional Block Diagram
0.22
µF
VREG
VDD
ROSC
CP1
0.1
µF
CP2
Current
Regulator
OSC
Charge
Pump
VCP
0.1
µF
DMOS Full Bridge
REF
DAC
VBB1
OUT1A
OUT1B
PWM Latch
Blanking
Mixed Decay
OCP
Gate
Drive
Control
Logic
OCP
STEP
DIR
RESET
MS1
MS2
Translator
SENSE1
DMOS Full Bridge
VBB2
R
S1
OUT2A
OUT2B
ENABLE
SLEEP
DAC
V
REF
PWM Latch
Blanking
Mixed Decay
SENSE2
R
S2
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
3
A4982
Characteristics
Output Drivers
Load Supply Voltage Range
Logic Supply Voltage Range
Output On Resistance
Body Diode Forward Voltage
Motor Supply Current
DMOS Microstepping Driver with Translator
And Overcurrent Protection
Symbol
V
BB
V
DD
R
DSON
V
F
I
BB
Test Conditions
Operating
During Sleep Mode
Operating
Source Driver, I
OUT
= –1.5 A
Sink Driver, I
OUT
= 1.5 A
Source Diode, I
F
= –1.5 A
Sink Diode, I
F
= 1.5 A
f
PWM
< 50 kHz
Operating, outputs disabled
Sleep Mode
f
PWM
< 50 kHz
Outputs off
Sleep Mode
Min.
8
0
3.0
–
–
–
–
–
–
–
–
–
–
V
DD
×
0.7
V
IN
= V
DD
×
0.7
–
–20
–20
–
–
5
0.7
20
23
0
–3
–
–
–
100
2.1
–
–
2.7
–
Typ.
2
–
–
–
320
320
–
–
–
–
–
–
–
–
–
–
<1.0
<1.0
100
33.3
11
1
30
30
–
0
–
–
–
475
–
165
15
2.8
90
Max.
35
35
5.5
430
430
1.3
1.3
4
2
10
8
5
10
–
V
DD
×
0.3
20
20
–
–
19
1.3
40
37
4
3
±15
±5
±5
800
–
–
–
2.9
–
Units
V
V
V
mΩ
mΩ
V
V
mA
mA
μA
mA
mA
μA
V
V
µA
µA
kΩ
kΩ
%
μs
μs
μs
V
μA
%
%
%
ns
A
°C
°C
V
mV
ELECTRICAL CHARACTERISTICS
1
at T
A
= 25°C, V
BB
= 35 V (unless otherwise noted)
Logic Supply Current
Control Logic
Logic Input Voltage
Logic Input Current
Microstep Select
Logic Input Hysteresis
Blank Time
Fixed Off-Time
Reference Input Voltage Range
Reference Input Current
Current Trip-Level Error
3
Crossover Dead Time
Protection
Overcurrent Protection Threshold
4
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
VDD Undervoltage Lockout
VDD Undervoltage Hysteresis
1
For
2
Typical
I
DD
V
IN(1)
V
IN(0)
I
IN(1)
I
IN(0)
R
MS1
R
MS2
V
HYS(IN)
t
BLANK
t
OFF
V
REF
I
REF
err
I
V
IN
= V
DD
×
0.3
MS1 pin
MS2 pin
As a % of V
DD
OSC = VDD or GND
R
OSC
= 25 kΩ
t
DT
I
OCPST
T
TSD
T
TSDHYS
V
DDUVLO
V
REF
= 2 V,
%I
TripMAX
=
38.27%
V
REF
= 2 V,
%I
TripMAX
= 70.71%
V
REF
= 2 V,
%I
TripMAX
= 100.00%
V
DDUVLOHYS
V
DD
rising
input and output current specifications, negative current is defined as coming out of (sourcing) the specified device pin.
data are for initial design estimations only, and assume optimum manufacturing and application conditions. Performance may vary for individual
units, within the specified maximum and minimum limits.
3
V
ERR
= [(V
REF
/8) – V
SENSE
] / (V
REF
/8).
4
Overcurrent protection (OCP) is tested at T = 25°C in a restricted range and guaranteed by characterization.
A
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
4
A4982
DMOS Microstepping Driver with Translator
And Overcurrent Protection
THERMAL CHARACTERISTICS may require derating at maximum conditions
Characteristic
Symbol
R
θJA
Test Conditions*
Package Thermal Resistance
ET package; estimated, on 4-layer PCB, based on JEDEC standard
LP package; on 4-layer PCB, based on JEDEC standard
Value Units
32
28
ºC/W
ºC/W
*In still air. Additional thermal information available on Allegro Web site.
Maximum Power Dissipation, P
D
(max)
5.5
5.0
4.5
4.0
Power Dissipation, P
D
(W)
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
(R
θ
J
A
(R
=
θ
J
A
=
31
28
)
ºC
ºC
/W
/W
)
20
40
60
80
100
120
Temperature (°C)
140
160
180
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5
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