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MBM29DL800BA-12PBT-SF2: 产品描述Flash, 512KX16, 120ns, PBGA48,; 产品类别存储存储; 文件大小601KB，共59页; 制造商SPANSION; 官网地址http://www.spansion.com/

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MBM29DL800BA-12PBT-SF2概述

Flash, 512KX16, 120ns, PBGA48,

MBM29DL800BA-12PBT-SF2规格参数

参数名称	属性值
是否Rohs认证	不符合
厂商名称	SPANSION
包装说明	FBGA, BGA48,6X8,32
Reach Compliance Code	unknown
最长访问时间	120 ns
备用内存宽度	8
启动块	BOTTOM
命令用户界面	YES
数据轮询	YES
JESD-30 代码	R-PBGA-B48
JESD-609代码	e0
内存密度	8388608 bit
内存集成电路类型	FLASH
内存宽度	16
部门数/规模	2,4,2,14
端子数量	48
字数	524288 words
字数代码	512000
最高工作温度	85 °C
最低工作温度	-40 °C
组织	512KX16
封装主体材料	PLASTIC/EPOXY
封装代码	FBGA
封装等效代码	BGA48,6X8,32
封装形状	RECTANGULAR
封装形式	GRID ARRAY, FINE PITCH
并行/串行	PARALLEL
电源	3/3.3 V
认证状态	Not Qualified
就绪/忙碌	YES
部门规模	16K,8K,32K,64K
最大待机电流	0.000005 A
最大压摆率	0.045 mA
表面贴装	YES
技术	CMOS
温度等级	INDUSTRIAL
端子面层	Tin/Lead (Sn/Pb)
端子形式	BALL
端子节距	0.8 mm
端子位置	BOTTOM
切换位	YES
类型	NOR TYPE

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FUJITSU SEMICONDUCTOR

DATA SHEET

DS05-20860-3E

FLASH MEMORY

CMOS

8M (1M

8/512K

16) BIT

MBM29DL800TA

-70/-90/-12

/MBM29DL800BA

-70/-90/-12

FEATURES

• Single 3.0 V read, program, and erase

Minimizes system level power requirements

• Simultaneous operations

Read-while-Erase or Read-while-Program

• Compatible with JEDEC-standard commands

Uses same software commands as E

PROMs

• Compatible with JEDEC-standard world-wide pinouts (Pin compatible with MBM29LV800TA/BA)

48-pin TSOP(I) (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type)

48-ball FBGA (Package suffix: PBT)

• Minimum 100,000 program/erase cycles

• High performance

70 ns maximum access time

• Sector erase architecture

Two 16K byte, four 8K bytes, two 32K byte, and fourteen 64K bytes.

Any combination of sectors can be concurrently erased. Also supports full chip erase.

• Boot Code Sector Architecture

T = Top sector

B = Bottom sector

• Embedded Erase

Algorithms

Automatically pre-programs and erases the chip or any sector

• Embedded Program

Algorithms

Automatically writes and verifies data at specified address

• Data Polling and Toggle Bit feature for detection of program or erase cycle completion

• Ready/Busy output (RY/BY)

Hardware method for detection of program or erase cycle completion

• Automatic sleep mode

When addresses remain stable, automatically switch themselves to low power mode.

• Low V

write inhibit

≤

2.5 V

• Erase Suspend/Resume

Suspends the erase operation to allow a read in another sector within the same device

(Continued)

Embedded Erase

and Embedded Program

are trademarks of Advanced Micro Devices, Inc.

MBM29DL800TA

-70/-90/-12

/MBM29DL800BA

-70/-90/-12

GENERAL DESCRIPTION

The MBM29DL800TA/BA are a 8M-bit, 3.0 V-only Flash memory organized as 1M bytes of 8 bits each or 512K

words of 16 bits each. The MBM29DL800TA/BA are offered in a 48-pin TSOP(I) and 48-ball FBGA packages.

These devices are designed to be programmed in-system with the standard system 3.0 V V

supply. 12.0 V

and 5.0 V V

are not required for write or erase operations. The devices can also be reprogrammed in

standard EPROM programmers.

MBM29DL800TA/BA provides simultaneous operation which can read a data while program/erase. The

simultaneous operation architecture provides simultaneous operation by dividing the memory space into two

banks. The device can allow a host system to program or erase in one bank, then immediately and simultaneously

read from the other bank.

The standard MBM29DL800TA/BA offer access times 70 ns and 120 ns, allowing operation of high-speed

microprocessors without wait states. To eliminate bus contention the devices have separate chip enable (CE),

write enable (WE), and output enable (OE) controls.

The MBM29DL800TA/BA are pin and command set compatible with JEDEC standard E

PROMs. Commands

are written to the command register using standard microprocessor write timings. Register contents serve as

input to an internal state-machine which controls the erase and programming circuitry. Write cycles also internally

latch addresses and data needed for the programming and erase operations. Reading data out of the devices

is similar to reading from 5.0 V and 12.0 V Flash or EPROM devices.

The MBM29DL800TA/BA are programmed by executing the program command sequence. This will invoke the

Embedded Program Algorithm which is an internal algorithm that automatically times the program pulse widths

and verifies proper cell margin. Typically, each sector can be programmed and verified in about 0.5 seconds.

Erase is accomplished by executing the erase command sequence. This will invoke the Embedded Erase

Algorithm which is an internal algorithm that automatically preprograms the array if it is not already programmed

before executing the erase operation. During erase, the devices automatically time the erase pulse widths and

verify proper cell margin.

A sector is typically erased and verified in 1.0 second. (If already completely preprogrammed.)

The devices also feature a sector erase architecture. The sector mode allows each sector to be erased and

reprogrammed without affecting other sectors. The MBM29DL800TA/BA are erased when shipped from the

factory.

The devices feature single 3.0 V power supply operation for both read and write functions. Internally generated

and regulated voltages are provided for the program and erase operations. A low V

detector automatically

inhibits write operations on the loss of power. The end of program or erase is detected by Data Polling of DQ

by the Toggle Bit feature on DQ

, or the RY/BY output pin. Once the end of a program or erase cycle has been

completed, the devices internally reset to the read mode.

Fujitsu’s Flash technology combines years of EPROM and E2PROM experience to produce the highest levels

of quality, reliability, and cost effectiveness. The MBM29DL800TA/BA memories electrically erase the entire chip

or all bits within a sector simultaneously via Fowler-Nordhiem tunneling. The bytes/words are programmed one

byte/word at a time using the EPROM programming mechanism of hot electron injection.

MBM29DL800BA-12PBT-SF2相似产品对比

	MBM29DL800BA-12PBT-SF2	MBM29DL800TA-12PBT-SF2	MBM29DL800BA-12PFTR
描述	Flash, 512KX16, 120ns, PBGA48,	Flash, 512KX16, 120ns, PBGA48,	Flash, 512KX16, 120ns, PDSO48,
是否Rohs认证	不符合	不符合	不符合
厂商名称	SPANSION	SPANSION	SPANSION
Reach Compliance Code	unknown	unknown	not_compliant
最长访问时间	120 ns	120 ns	120 ns
备用内存宽度	8	8	8
启动块	BOTTOM	TOP	BOTTOM
命令用户界面	YES	YES	YES
数据轮询	YES	YES	YES
JESD-30 代码	R-PBGA-B48	R-PBGA-B48	R-PDSO-G48
JESD-609代码	e0	e0	e0
内存密度	8388608 bit	8388608 bit	8388608 bit
内存集成电路类型	FLASH	FLASH	FLASH
内存宽度	16	16	16
部门数/规模	2,4,2,14	2,4,2,14	2,4,2,14
端子数量	48	48	48
字数	524288 words	524288 words	524288 words
字数代码	512000	512000	512000
最高工作温度	85 °C	85 °C	85 °C
最低工作温度	-40 °C	-40 °C	-40 °C
组织	512KX16	512KX16	512KX16
封装主体材料	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
封装代码	FBGA	FBGA	TSSOP
封装等效代码	BGA48,6X8,32	BGA48,6X8,32	TSSOP48,.8,20
封装形状	RECTANGULAR	RECTANGULAR	RECTANGULAR
封装形式	GRID ARRAY, FINE PITCH	GRID ARRAY, FINE PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
并行/串行	PARALLEL	PARALLEL	PARALLEL
电源	3/3.3 V	3/3.3 V	3/3.3 V
认证状态	Not Qualified	Not Qualified	Not Qualified
就绪/忙碌	YES	YES	YES
部门规模	16K,8K,32K,64K	16K,8K,32K,64K	16K,8K,32K,64K
最大待机电流	0.000005 A	0.000005 A	0.000005 A
最大压摆率	0.045 mA	0.045 mA	0.045 mA
表面贴装	YES	YES	YES
技术	CMOS	CMOS	CMOS
温度等级	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
端子面层	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
端子形式	BALL	BALL	GULL WING
端子节距	0.8 mm	0.8 mm	0.5 mm
端子位置	BOTTOM	BOTTOM	DUAL
切换位	YES	YES	YES
类型	NOR TYPE	NOR TYPE	NOR TYPE
包装说明	FBGA, BGA48,6X8,32	FBGA, BGA48,6X8,32	-

MBM29DL800BA-12PBT-SF2

MBM29DL800BA-12PBT-SF2概述

MBM29DL800BA-12PBT-SF2规格参数

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