To all our customers
Regarding the change of names mentioned in the document, such as Hitachi
Electric and Hitachi XX, to Renesas Technology Corp.
The semiconductor operations of Mitsubishi Electric and Hitachi were transferred to Renesas
Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog
and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.)
Accordingly, although Hitachi, Hitachi, Ltd., Hitachi Semiconductors, and other Hitachi brand
names are mentioned in the document, these names have in fact all been changed to Renesas
Technology Corp. Thank you for your understanding. Except for our corporate trademark, logo and
corporate statement, no changes whatsoever have been made to the contents of the document, and
these changes do not constitute any alteration to the contents of the document itself.
Renesas Technology Home Page: http://www.renesas.com
Renesas Technology Corp.
Customer Support Dept.
April 1, 2003
Cautions
Keep safety first in your circuit designs!
1. Renesas Technology Corporation puts the maximum effort into making semiconductor products better
and more reliable, but there is always the possibility that trouble may occur with them. Trouble with
semiconductors may lead to personal injury, fire or property damage.
Remember to give due consideration to safety when making your circuit designs, with appropriate
measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or
(iii) prevention against any malfunction or mishap.
Notes regarding these materials
1. These materials are intended as a reference to assist our customers in the selection of the Renesas
Technology Corporation product best suited to the customer's application; they do not convey any
license under any intellectual property rights, or any other rights, belonging to Renesas Technology
Corporation or a third party.
2. Renesas Technology Corporation assumes no responsibility for any damage, or infringement of any
third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or
circuit application examples contained in these materials.
3. All information contained in these materials, including product data, diagrams, charts, programs and
algorithms represents information on products at the time of publication of these materials, and are
subject to change by Renesas Technology Corporation without notice due to product improvements or
other reasons. It is therefore recommended that customers contact Renesas Technology Corporation
or an authorized Renesas Technology Corporation product distributor for the latest product information
before purchasing a product listed herein.
The information described here may contain technical inaccuracies or typographical errors.
Renesas Technology Corporation assumes no responsibility for any damage, liability, or other loss
rising from these inaccuracies or errors.
Please also pay attention to information published by Renesas Technology Corporation by various
means, including the Renesas Technology Corporation Semiconductor home page
(http://www.renesas.com).
4. When using any or all of the information contained in these materials, including product data, diagrams,
charts, programs, and algorithms, please be sure to evaluate all information as a total system before
making a final decision on the applicability of the information and products. Renesas Technology
Corporation assumes no responsibility for any damage, liability or other loss resulting from the
information contained herein.
5. Renesas Technology Corporation semiconductors are not designed or manufactured for use in a device
or system that is used under circumstances in which human life is potentially at stake. Please contact
Renesas Technology Corporation or an authorized Renesas Technology Corporation product distributor
when considering the use of a product contained herein for any specific purposes, such as apparatus or
systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use.
6. The prior written approval of Renesas Technology Corporation is necessary to reprint or reproduce in
whole or in part these materials.
7. If these products or technologies are subject to the Japanese export control restrictions, they must be
exported under a license from the Japanese government and cannot be imported into a country other
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Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the
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8. Please contact Renesas Technology Corporation for further details on these materials or the products
contained therein.
HD74CDC2510B
3.3-V Phase-lock Loop Clock Driver
ADE-205-219G (Z)
8th. Edition
June 2000
Description
The HD74CDC2510B is a high-performance, low-skew, low-jitter, phase-lock loop clock driver. It uses a
phase-lock loop (PLL) to precisely align, in both frequency and phase, the feedback (FBOUT) output to the
clock (CLK) input signal. It is specifically designed for use with synchronous DRAMs. The
HD74CDC2510B operates at 3.3 V V
CC
and is designed to drive up to five clock loads per output.
Bank of outputs provide ten low-skew, low-jitter copies of the input clock. Output signal duty cycles are
adjusted to 50 percent independent of the duty cycle at the input clock. Bank of outputs can be enabled or
disabled via the control (G) inputs. When the G inputs are high, the outputs switch in phase and frequency
with CLK; when the G inputs are low, the outputs are disabled to the logic-low state.
Unlike many products containing PLLs, the HD74CDC2510B does not require external RC networks. The
loop filter for the PLL is included on-chip, minimizing component count, board space, and cost.
Because it is based on PLL circuitry, HD74CDC2510B requires a stabilization time to achieve phase lock
of the feedback signal to the reference signal. This stabilization time is required, following power up and
application of a fixed-frequency, fixed-phase signal at CLK, as well as following any changes to the PLL
reference or feedback signals. The PLL can be bypassed for test purposes by strapping AV
CC
to ground.
Features
•
•
•
•
•
Meets “PC SDRAM registered DIMM design support document, Rev. 1.2”
Phase-lock loop clock distribution for synchronous DRAM applications
External feedback (FBIN) pin is used to synchronize the outputs to the clock input
No external RC network required
Support spread spectrum clock (SSC) synthesizers
Only by a change of a suffix (A to B) for standardization, there isn’t any change of the product.
Note:
HD74CDC2510B
Function Table
Inputs
G
X
L
H
H:
L:
X:
High level
Low level
Immaterial
CLK
L
H
H
Outputs
1Y (0:9)
L
L
H
FBOUT
L
H
H
Pin Arrangement
AGND 1
V
CC
2
24 CLK
23 AV
CC
22 V
CC
21 1Y9
20 1Y8
19 GND
18 GND
17 1Y7
16 1Y6
15 1Y5
14 V
CC
13 FBIN
1Y0 3
1Y1 4
1Y2 5
GND
6
GND 7
1Y3 8
1Y4
9
V
CC
10
G 11
FBOUT 12
(Top view)
HD74CDC2510B
Absolute Maximum Ratings
Item
Supply voltage
Input voltage
*1
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
I
CC
or I
GND
P
T
T
stg
Ratings
–0.5 to 4.6
–0.5 to 6.5
Unit
V
V
Conditions
Output voltage
*1, 2
Input clamp current
Output clamp current
Continuous output current
Supply current
Maximum power dissipation
at Ta = 55°C (in still air)
*3
Storage temperature
Notes:
–0.5 to V
CC
+0.5 V
–50
±50
±50
±100
0.7
–65 to +150
mA
mA
mA
mA
W
°C
V
I
< 0
V
O
< 0 or V
O
> V
CC
V
O
= 0 to V
CC
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage
to the device. These are stress ratings only, and functional operation of the device at these or
any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute maximum rated conditions for extended periods may affect
device reliability.
1. The input and output negative voltage ratings may be exceeded if the input and output clamp
current ratings are observed.
2. This value is limited to 4.6 V maximum.
3. The maximum package power dissipation is calculated using a junction temperature of 150°C and
a board trace length of 750 mils.
Recommended Operating Conditions
Item
Supply voltage
Input voltage
Symbol Min
V
CC
V
IH
V
IL
V
I
Output current
I
O H
I
O L
Operating temperature
T
a
3.0
2.0
—
0
—
—
0
Typ
—
—
—
—
—
—
—
Max
3.6
—
0.8
V
CC
–12
12
85
°C
mA
Unit
V
V
Conditions
Note: Unused inputs must be held high or low to prevent them from floating.
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