Double-cell Memory for Plug & Play
DDR1/DDR2
(For memory module) SPD Memory
BR34L02FV-W
●Description
BR34L02FV-W is 256×8 bit Electrically Erasable PROM (Based on Serial Presence Detect)
●Features
1) 256×8 bit architecture serial EEPROM
2) Wide operating voltage range: 1.7V-5.5V
3) Two-wire serial interface
4) High reliability connection using Au pads and Au wires
5) Self-Timed Erase and Write Cycle
6) Page Write Function (16byte)
7) Write Protect Mode
Write Protect 1 (Onetime Rom)
: 00h-7Fh
Write Protect 2 (Hardwire WP PIN) : 00h-FFh
8) Low Power consumption
Write
( at 5V ) :1.2mA (typ.)
Read
( at 5V ) :0.2mA(typ.)
Standby ( at 5V ) :0.1µA(typ.)
9) DATA security
Write protect feature (WP pin)
Inhibit to WRITE at low V
CC
10) Compact package: SSOP-B8
11) High reliability fine pattern CMOS technology
12) Rewriting possible up to 1,000,000 times
13) Data retention: 40 years
14) Noise reduction Filtered inputs in SCL / SDA
15) Initial data FFh at all addresses
●Absolute
Maximum Ratings (Ta=25℃)
Parameter
Symbol
Supply Voltage
V
CC
Power Dissipation
Pd
Storage Temperature
Tstg
Operating Temperature
Topr
Terminal Voltage
-
* Reduce by 3.0 mW/C over 25C
No.09002EAT04
Rating
-0.3½+6.5
300*
-65½+125
-40½+85
-0.3½V
CC
+0.3
Unit
V
mW
℃
℃
V
●Recommended
operating conditions
Parameter
Symbol
Supply Voltage
V
CC
Input Voltage
ＶIN
Rating
1.7½5.5
0½V
CC
Unit
V
V
●Memory
cell characteristics(Ta=25℃, V
CC
=1.7V½5.5V)
Specification
Parameter
Min.
Typ.
Write / Erase Cycle
Data Retention
*1:Not 100% TESTED
*1
*1
Max.
-
-
Unit
Cycles
Years
1,000,000
40
-
-
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© 2009 ROHM Co., Ltd. All rights reserved.
1/17
2009.04 - Rev.A
BR34L02FV-W
●Electrical
characteristics - DC(Unless otherwise specified Ta=-40℃½+85℃, V
CC
=1.7V½5.5V)
Specification
Parameter
Symbol
Unit
Min.
Typ.
Max.
"H" Input Voltage 1
"L" Input Voltage 1
"H" Input Voltage 2
"L" Input Voltage 2
"L" Output Voltage 1
"L" Output Voltage 2
Input Leakage Current 1
Input Leakage Current 2
Output Leakage Current
VIH1
VIL1
VIH2
VIL2
VOL1
VOL2
ILI1
ILI2
ILO
ICC1
Operating Current
ICC2
-
-
0.5
mA
0.7 V
CC
-
0.8 V
CC
-
-
-
-1
-1
-1
-
-
-
-
-
-
-
-
-
-
-
-
0.3 V
CC
-
0.2 V
CC
0.4
0.2
1
15
1
2.0
V
V
V
V
V
V
µA
µA
µA
mA
Technical Note
Test Condition
2.5V≦V
CC
≦5.5V
2.5V≦V
CC
≦5.5V
1.7V≦V
CC
＜2.5V
1.7V≦V
CC
＜2.5V
IOL=3.0mA，2.5V≦V
CC
≦5.5V(SDA)
IOL=0.7mA，1.7V≦V
CC
＜2.5V(SDA)
VIN=0V½V
CC
(A0,A1,A2,SCL)
VIN=0V½V
CC
(WP)
VOUT=0V½V
CC
(SDA)
V
CC
=5.5V,fSCL=400kHz，tWR=5ms
Byte Write
Page Write
Write Protect
V
CC
=5.5V,fSCL=400kHz
Random Read
Current Read
Sequential Read
V
CC
=5.5V,SDA,SCL= V
CC
A0,A1,A2=GND,WP=GND
Standby Current
ISB
-
-
2.0
µA
○Note:
This IC is not designed to be radiation-resistant.
●Electrical
characteristics - AC(Unless otherwise specified Ta=-40℃½+85℃, V
CC
=1.7V½5.5V)
FAST-MODE
STANDARD-MODE
2.5V≦V
CC
≦5.5V
1.7V≦V
CC
≦5.5V
Parameter
Symbol
Min.
Typ.
Max.
Min.
Typ.
Max.
Clock Frequency
fSCL
-
-
400
-
-
100
Data Clock High Period
tHIGH
0.6
-
-
4.0
-
-
Data Clock Low Period
tLOW
1.2
-
-
4.7
-
-
*1
SDA and SCL Rise Time
tR
-
-
0.3
-
-
1.0
*1
SDA and SCL Fall Time
tF
-
-
0.3
-
-
0.3
Start Condition Hold Time
tHD:STA
0.6
-
-
4.0
-
-
Start Condition Setup Time
tSU:STA
0.6
-
-
4.7
-
-
Input Data Hold Time
tHD:DAT
0
-
-
0
-
-
Input Data Setup Time
tSU:DAT
50
-
-
50
-
-
Output Data Delay Time
tPD
0.1
-
0.9
0.2
-
3.5
Output Data Hold Time
tDH
0.1
-
-
0.2
-
-
Stop Condition Setup Time
tSU:STO
0.6
-
-
4.7
-
-
Bus Free Time
tBUF
1.2
-
-
4.7
-
-
Write Cycle Time
tWR
-
-
5
-
-
5
Noise Spike Width (SDA and SCL)
tI
-
-
0.1
-
-
0.1
WP Hold Time
tHD：WP
0
-
-
0
-
-
WP Setup Time
tSU：WP
0.1
-
-
0.1
-
-
WP High Period
tHIGH：WP
1.0
-
-
1.0
-
-
*1：Not 100％ TESTED
Unit
kHz
µs
µs
µs
µs
µs
µs
ns
ns
µs
µs
µs
µs
ms
µs
ns
µs
µs
■Fast
/ Standard Modes
Fast mode and Standard mode differ only in operation frequency. Operations performed at 100kHz are considered in
"Standard-mode", while those conducted at 400kHz are in "Fast-mode".
Please note that these clock frequencies are maximum values. At lower power supply voltage it is difficult to operate at high speeds.
The EEPROM can operate at 400kHz, between 2.5V and 5.5V, and at 100kHz from 1.7V-5.5V.
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© 2009 ROHM Co., Ltd. All rights reserved.
2/17
2009.04 - Rev.A
BR34L02FV-W
●Synchronous
Data Timing
Technical Note
tR
SCL
tHD:STA
SDA
(IN)
tBUF
SDA
(OUT)
tF
tHIGH
SCL
tSU:DAT
tLOW
tHD:DAT
tSU:STA
SDA
tHD:STA
tSU:STO
tPD
tDH
START BIT
STOP BIT
Fig.1-(a) Synchronous Data Timing
○SDA
data is latched into the chip at the rising edge
○
of SCL clock.
○Output
data toggles at the falling edge of SCL clock.
SCL
SCL
Fig.1-(b) Start/Stop Bit Timing
DATA(1)
SDA
D1
D0
ACK
DATA(n)
ACK
½WR
SDA
D0
WRITE DATA(n)
ACK
t
WR
STOP CONDITION
START CONDITION
WP
Stop Condition
tSU：WP
½HD：WP
Fig.1-(c) Write Cycle Timing
Fig.1-(d) WP Timing Of The Write Operation
SCL
DATA(1)
SDA
D1
D0
ACK
tHIGH:WP
WP
DATA(n)
ACK
tWR
Fig.1-(e) WP Timing Of The Write Cancel Operation
○For
WRITE operation, WP must be "Low" from the rising edge of the
clock (which takes in D0 of first byte) until the end of tWR. (See
Fig.1-(d) ) During this period, WRITE operation can be canceled by
setting WP "High".（See Fig.1-(e)）
○When
WP is set to "High" during tWR, WRITE operation is
immediately ceased, making the data unreliable. It must then be
re-written.
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© 2009 ROHM Co., Ltd. All rights reserved.
3/17
2009.04 - Rev.A
BR34L02FV-W
●Block
diagram
A0
1
8bit
ADDRESS
DECODER
8bit
SLAVE , WORD
ADDRESS REGISTER
8
8bit
DATA
REGISTER
VCC
Technical Note
2 Kbit EEPROM ARRAY
A1
2
7
WP
START
A2
3
CONTOROL LOGIC
STOP
6
ACK
SCL
GND
4
HIGH VOLTAGE GEN.
VCC LEVEL DETECT
5
SDA
Fig.2 Block Diagram
●Pinout
diagram and description
Pin Name
A0 1
A1 2
BR34L02FV-W
A2 3
GND 4
Fig.3 Pin Configuration
6 SCL
5 SDA
SDA
WP
IN / OUT
IN
8 V
CC
7 WP
V
CC
GND
A0,A1,A2
SCL
Input/Output
-
-
IN
IN
Functions
Power Supply
Ground 0V
Slave Address Set.
Serial Clock Input
Slave and Word Address,
Serial Data Input, Serial Data Output
Write Protect Input
*1
*2
*1 Open drain output requires a pull-up resistor.
*2 WP Pin has a Pull-Down resistor. Please leave unconnected or
connect to GND when not in use.
●Electrical
characteristics curves
The following characteristic data are typ. value.
6
5
4
VIH1,2[V]
3
2
1
0
0
1
2
3
V
CC
[V]
4
5
6
Ta=85
℃
Ta=-40
℃
Ta=25
℃
6
5
4
3
2
1
SPEC
Ta=85℃
Ta=-40℃
Ta=25℃
1
0.8
0.6
SPEC
Ta=85℃
VOL1[V]
SPEC
VIL1,2[V]
0.4
Ta=25℃
0.2
Ta=-40℃
0
0
1
2
3
V
CC
[V]
4
5
6
0
0
1
2
3
IOL1[mA]
4
5
6
Fig.4 "H" Input Voltage VIH1,2
(A0,A1,A2,SCL,SDA,WP)
1
0.8
0.6
0.4
SPEC
Fig.5 "L" Input Voltage VIL1,2
(A0,A1,A2,SCL,SDA,WP)
1.2
SPEC
Fig.6 "L" Output Voltage
VOL1-IOL1 (V
CC
=2.5V)
16
SPEC
1
12
0.8
ILI1[μA]
Ta=85℃
Ta=25℃
VOL2[V]
0.6
0.4
0.2
0
Ta=85℃
Ta=25℃
Ta=-40℃
ILI2[μA]
8
Ta=85℃
Ta=25℃
Ta=-40℃
0.2
Ta=-40℃
4
0
0
1
2
3
IOL2[mA]
4
5
6
0
0
1
2
3
V
CC
[V]
4
5
6
0
1
2
3
V
CC
[V]
4
5
6
Fig.7 "L" Output Voltage
VOL2-IOL2 (V
CC
=1.7V)
Fig.8 Input Leakage Current
ILI1 (A0,A1,A2,SCL,SDA)
Fig.9 Input Leakage Current
ILI2 (WP)
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© 2009 ROHM Co., Ltd. All rights reserved.
4/17
2009.04 - Rev.A
BR34L02FV-W
Technical Note
2.5
SPEC
0.6
SPEC
0.6
SPEC
2
fSCL=400kHz(V
CC
≧
2.5V)
fSCL=100kHz(1.7V
≦
Vcc
＜
2.5V)
DATA=AA
0.5
fSCL=400kHz
0.4
DATA=AAh
0.5
0.4
0.3
Ta=85
℃
Ta=25
℃
fSCL=100kHz
DATA=AAh
ICC2[mA]
0.3
Ta=85
℃
Ta=25
℃
1
0.5
Ta=25
℃
Ta=85
℃
Ta=-40
℃
0.2
0.1
0
Ta=-40
℃
ICC2[mA]
ICC1[mA]
1.5
0.2
0.1
Ta=-40
℃
0
0
1
2
3
V
CC
[V]
4
5
6
0
0
1
2
3
V
CC
[V]
4
5
6
0
1
2
3
V
CC
[V]
4
5
6
Fig.10 Write Operating Current
ICC1 (fSCL=100kHz,400kHz)
Fig.11 Read Operating Current
ICC2 (fSCL=400kHz)
Fig.12 Read Operating Current
ICC2 (fSCL=100kHz)
2.5
SPEC
10000
2
Ta=85
℃
Ta=25
℃
Ta=-40
℃
5
SPEC2
1000
fSCL[kHz]
SPEC1
4
tHIGH[μs]
3
2
1
0
0
1
2
3
V
CC
[V]
4
5
6
0
1
2
3
V
CC
[V]
4
5
6
SPEC1
SPEC1:FASTE
SPEC1:FAST-MODE
SPEC2:STANDD-MODE
SPEC2:STANDARD-MO
Ta=25
℃
Ta=-40℃
Ta=85℃
ISB[μA]
1.5
100
SPEC2
1
Ta=85
℃
Ta=-40
℃
Ta=25
℃
10
0.5
SPEC1:FAST-MODE
SPEC2:STANDARD-MOD
0
0
1
2
3
Vcc[V]
VCC[V]
4
5
6
1
Fig.13 Standby Current
ISB
Fig.14 Clock Frequency
fSCL
Fig.15 Data Clock High Period
tHigh
5
SPEC2
4
tHD:STA[μs]
5
SPEC2
4
5
SPEC2
4
tSU:STA[μs]
tLOW[μs]
3
SPEC1:FAST-MODE
SPEC2:STANDARD-MODE
SPEC1
3
SPEC1:FAST-MODE
SPEC2:STANDARD-MODE
3
SPEC1:FAST-MODE
SPEC2:STANDARD-MODE
2
Ta=85
℃
Ta=25
℃
Ta=-40
℃
2
SPEC1
Ta=-40
℃
Ta=25
℃
Ta=85
℃
4
5
6
2
SPEC1
Ta=-40
℃
Ta=25
℃
Ta=85
℃
4
5
6
1
1
1
0
0
1
2
3
V
CC
[V]
4
5
6
0
0
1
2
3
V
CC
[V]
0
0
1
2
3
V
CC
[V]
Fig.16 Data Clock Low Period
tLow
Fig.17 Start Condition Hold Time
tHD:STA
Fig.18 Start Condition Setup Time
tSU:STA
50
SPEC1,2
50
SPEC1,2
200
tHD:DAT(LOW)[μs]
0
tHD:DAT(HIGH)[μs]
Ta=85
℃
Ta=25
℃
Ta=-40
℃
0
-50
-100
-150
Ta=25
℃
tSU:DAT(HIGH)[ns]
-50
SPEC1:FAST-MODE
SPEC2:STANDARD-MODE
Ta=85
℃
100
SPEC1,2
Ta=85
℃
Ta=25
℃
Ta=-40
℃
0
-100
SPEC1:FAST-MODE
SPEC2:STANDARD-MODE
-150
Ta=-40
℃
-100
SPEC1:FAST-MODE
SPEC2:STANDARD-MODE
-200
0
1
2
3
V
CC
[V]
4
5
6
-200
0
1
2
3
VCC[V]
4
5
6
-200
0
1
2
3
Vcc[V]
VCC[V]
4
5
6
Fig.19 Input Data Hold Time
tHD:DAT(High)
Fig.20 Input Data Hold Time
tHD:DAT(LOW)
Fig.21 Input Data Setup Time
tSU:DAT(High)
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© 2009 ROHM Co., Ltd. All rights reserved.
5/17
2009.04 - Rev.A
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