M-984-02
Special Information Tone Detector
Features
•
Detects single-frequency tones used for error
indication and call progress in telephone systems
•
Provides detection windows for:
400/425 Hz (Call Progress)
950 Hz (Special and error indication)
1400 Hz (Special and error indication)
1800 Hz (Special and error indication)
•
Separate tri-state outputs for each tone window
•
Inexpensive 3.58 MHz crystal time base
•
Auxiliary 3.58 MHz clock output
•
14-pin DIP package and 16-pin SOIC package
•
Single supply 3 to 5 volt (low power CMOS)
•
Wide dynamic range (30 dBm)
Applications
•
•
•
•
•
•
Automatic dialers
Modems
Telecom test equipment
Telephone traffic measurement,
Service evaluation
Billing equipment
Description
The M-984-02 Special Information Tone Detector is a
monolithic integrated circuit designed to provide reli-
able detection of many common telephone network
status signals. In particular, it detects the signals
known as Special Information Tones (SITs) or error
tones as defined by the CCITT, and single tones often
used as dial tone, audible ringing, and other general
progress indications. The M-984-02 uses CMOS
switched capacitor filters and a crystal time base to
achieve the high stability and accuracy specified. Each
tone detection window has an associated output pin,
which can be placed in a high impedance state for use
with time-share microcomputer bus applications.
In comparison with the earlier M-984, the M-984-02
has wider acceptance bands for SIT tones to facilitate
reception of tape-loop tones, lower power consump-
tion at 5V operation, 3V operation, superior tempera-
ture performance, lower cost, and is available in DIP,
SOIC, and SOIC tape and reel versions.
Ordering Information
Part #
M-984-02P
M-984-02S
M-984-02T
Description
14-pin plastic DIP
16-pin plastic, SOIC
16-pin SOIC, Tape and Reel
Pin Diagram
Block Diagram
DS-M984-02-R3
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1
M-984-02
Absolute Maximum Ratings
DC Supply Voltage
Input Voltage on SIGIN
Input Voltage on Any Pin
(except SIGIN)
Storage Temperature Range
Operating Temperature Range
Lead Soldering Temperature
7V
V
SS
- 6.5V to V
DD
+0.3V
V
SS
- 0.3 to V
DD
+ 0.3V
-40°C to +150°C
-40°C to +85°C
260°C for 5 seconds
Absolute Maximum Ratings are stress ratings. Stresses in
excess of these ratings can cause permanent damage to
the device. Functional operation of the device at these or
any other conditions beyond those indicated in the opera-
tional sections of this data sheet is not implied. Exposure of
the device to the absolute maximum ratings for an extend-
ed period may degrade the device and effect its reliability.
Note:
Exceeding these ratings may permanently damage the device.
Specifications
Parameter
Operating Conditions
Power
V
REF
Signal Detection
V
DD
Power supply noise
Current drain (I
DD
)
V
REF
Impedance
Frequency Range
Level: V
DD
= 5.0V
Level: V
DD
= 3.0V
Duration
Bridge Time
Signal to Noise Ratio
Frequency Range
Level: V
DD
= 5.0V
Level: V
DD
= 3.0V
Duration
Except X358
V
OL
V
OH
Dn pins only
I
OZ
EN pin
V
IL
V
IH
Pull-up and Pull-
down currents
MODE = V
SS
/XRANGE +V
SS
MODE2 = V
DD
PD = V
DD
SIGIN pin
Voltage range
Input impedance
Input Spectrum
External clock
V
IL
connected to
V
IH
XIN pin
Duty cycle
XIN, XOUT with
Capacitance
crystal ocs. active Internal res.
X358 pin
V
OL
V
OH
Duty cycle
t
EN
(High Z to Low Z)
t
DE
(Low Z to High Z)
Conditions
-
0.1 - 5 kHz
V
REF
open
-
-
-
-
-
f
c
= 400 Hz
f
c
= 950, 1400, 1800 Hz
-
-
-
-
-
-
I
SINK
= -1.0 mA
I
SOURCE
= 1.0 mA
V
O
= V
DD
, V
SS
-
V
DD
= 5V
V
DD
= 2.7V
V
DD
= 5V
V
DD
= 2.7V
-
V
DD
= 5V
V
DD
= 2.7V
-
-
f = 500 Hz
-
XOUT open
XOUT open
XOUT open
-
-
C
L
= 20 pF, I
SINK
= -1.0 mA
C
L
= 20 pF, I
SOURCE
= 1.0 mA
C
L
= 20 pF
C
L
= 50 pF
RL = 100 KΩ
Min
2.7
-
-
48% of V
DD
3.25
Note 1
-30 (24.5 mV)
-33 (17.4 mV)
85
50
-
16
Note 1
-
-
-
-
V
DD
-0.5
-
-
V
DD
-2.0
V
DD
- 0.5
12.5
4
2
12.5
12.5
4
-6.5
80
-
-
V
DD
- 0.2
40
-
20
-
V
DD
- 0.5
40
-
-
Max
5.5
20
15
52% of V
DD
8.25
Note 1
0 (775 mV)
-3 (173.5 mV)
-
-
15
-
Note 1
-40 (7.8 mV)
-43 (5.5 mV)
50
0.5
-
1
0.5
-
-
50
20
6
100
25
10
V
DD
-
28
0.2
-
60
10
-
0.5
-
60
250
250
Units
V
mV p-p
mA
V
kΩ
-
dBm
dBm
ms
ms
ms
dB
-
dBm
dBm
ms
V
V
µA
V
V
V
µA
µA
µA
µA
µA
µA
V
kΩ
kHz
V
V
%
pF
MΩ
V
V
%
ns
ns
Signal Rejection
Outputs
Inputs
Clock
Tri-state Operation
Unless otherwise noted, specifications hold over V
DD
- V
SS
= 2.8V to 5.5V power supply, and T
OL
-40°C to +85°C.
Notes:
1. See the Detector Frequency Windows table on page 4 for detection/ rejection frequencies.
2
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Rev. 3
M-984-02
Pin Functions
PIN
XIN
XOUT
X358
ENVLP
FUNCTION
Crystal Connection — 3.58 MHz crystal across these pins will produce the timebase needed for proper operation of the
M-984-02. An external clock signal may be fed to XIN providing the clock signal has a duty cycle of 50
±
10% and comes within
0.2 volts of the supply rails. XOUT remains unconnected when an external clock is used.
A buffered output pin. A 3.58 MHz clock signal is available for use in other circuits as a timebase. Leave open when unused.
The ENVLP pin is a common detection indicator for the four detect pins. Simply put, the ENVLP is a logical “OR” of the active
detect circuits for each of the four windows, though there is a delay provided to permit ENVLP to latch the first active detect pin.
ENVLP is not tri-state controlled.
The power supply pins, V
DD
being the most positive. Commonly, V
DD
is at 3-5 volts, white V
SS
is at ground.
Analog signal input. (Internally capacitively coupled.)
V
REF
is a bias voltage generated in the chip for use in external analog circuits, such as active filters and AC-coupled buffers.
Leave open when unused.
The tri-state control pin. OE places the DET pins in the active mode when at logic “1”. When at logic “0,” OE causes the DET
outputs to appear as high impedance. Should be tied to logic “1” when the M-984-02 is not used in a time-shared bus
application.
The detect outputs associated with each window. Tri-state control is available through use of the OE pin.
Timing is shown in the Timing Diagram on page 4.
V
SS
V
DD
SIGIN
V
REF
OE
D1800
D1400
D950
D400
Rev. 3
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