KS57C4104/P4104/C4204/P4204/C4304/P4304
PRODUCT OVERVIEW
1
OVERVIEW
PRODUCT OVERVIEW
The KS57C4104/KS57C4204/KS57C4304 single-chip CMOS microcontroller has been designed for very high
performance using Samsung's newest 4-bit CPU core, SAM47 (Samsung Arrangeable Microcontroller).
With an A/D converter, LED direct drive pins, an 8-bit serial I/O interface, and an 8-bit timer/counter, the
KS57C4104/KS57C4204/KS57C4304 offers you an excellent design solution for a wide variety of home
appliance applications — electric fans, cookers, boilers, and air conditioners, for example.
Up to 35 pins of the 42-pin SDIP or 44-pin QFP package can be dedicated to I/O. Seven vectored interrupts
provide fast response to internal and external events.
In addition, the KS57C4104/KS57C4204/KS57C4304's advanced CMOS technology provides for low power
consumption and a wide operating voltage range.
OTP
The KS57C4104/KS57C4204/KS57C4304 microcontroller is also available in OTP (One Time Programmable)
version, KS57P4104/KS57P4204/KS57P4304. KS57P4104/KS57P4204/KS57P4304 microcontroller has an on-
chip 4-Kbyte one-time-programmable EPROM instead of masked ROM. The
KS57P4104/KS57P4204/KS57P4304 is comparable to KS57C4104/KS57C4204/KS57C4304, in function, in D.C.
electrical characteristics and in pin configuration.
DEVELOPMENT SUPPORT
The Samsung Microcontroller Development System, SMDS, provides you with a complete PC-based develop-
ment environment for KS57-series microcontrollers that is powerful, reliable, and portable. In addition to its
window-based program development structure, the SMDS toolset includes versatile debugging, trace, instruction
timing, and performance measurement applications.
The Samsung Generalized Assembler (SAMA) has been designed specifically for the SMDS environment and
accepts assembly language sources in a variety of microprocessor formats. SAMA generates industry-standard
hex files that also contain program control data for SMDS compatibility.
1-1
PRODUCT OVERVIEW
KS57C4104/P4104/C4204/P4204/C4304/P4304
FEATURES SUMMARY
Memory
•
•
256
×
4-bit RAM
4,096
×
8-bit ROM
Built-in reset circuit (KS57C4304 only)
•
Built-in power-on reset circuit
Interrupts
•
•
•
Five internal vectored interrupts
(INTB, INTT0, INTT1, INTS, INTAD)
Three external vectored interrupts
(INT0, INT1, INT4)
Two quasi-interrupts (INT2, INTW)
35 I/O Pins
•
I/O: 31 pins including 8 LED direct drive pins
(KS57C4104/C4304)
18 pins including 8 LED direct drive pins
(KS57C4204)
Input only: 4 pins
•
Bit Sequential Carrier
A/D Converter
•
•
6-channel with 8-bit resolution
22.89 µs conversion speed at 4.19 MHz
•
Supports 16-bit serial data transfer in
arbitrary format
Memory-Mapped I/O Structure
•
Data memory bank 15
Basic Timer
•
•
•
One 8-bit basic timer
Watchdog timer functions
Four interval clock selection
Two Power-Down Modes
•
•
Idle mode (only CPU clock stops)
Stop mode (system oscillation stops)
Timer/Counters
•
•
•
•
•
Two 8-bit timer/counter (TC0, TC1)
Programmable 8-bit timer
External event counter
Arbitrary clock frequency output
PWM output mode (TC1)
Oscillation Sources
•
•
•
•
Crystal, Ceramic, or RC for system clock
Crystal, Ceramic: 0.4–6.0 MHz
RC: 4 MHz (typ)
CPU clock divider circuit (by 4, 8, or 64)
Instruction Execution Times
Watch Timer
•
•
•
One watch timer 8-bit
Time interval generation: 0.5 s, 3.9 ms at
4.19 MHz
Four frequency outputs to BUZ pin
•
•
0.95, 1.91, 15.3 µs at 4.19 MHz
0.67, 1.33, 10.7 µs at 6.0 MHz
Operating Temperature
•
– 40
°
C to 85
°
C
8-bit Serial I/O Interface
•
•
•
•
8-bit transmit/receive mode
8-bit receive mode
LSB-first or MSB-first transmission selectable
Internal or external clock source
Operating Voltage Range
•
•
1.8 V to 5.5 V (KS57C4104/C4204)
2.5 V to 5.5 V (KS57C4304)
Package Type
•
42-pin SDIP, 44-pin QFP (KS57C4104/C4304)
30-pin SDIP, 28-pin SOP (KS57C4204)
1-2
KS57C4104/P4104/C4204/P4204/C4304/P4304
PRODUCT OVERVIEW
Table 1-1. Comparision Table
Feature
Core
ROM
RAM
I/O
POR
(1)
SIO
Timer0
Timer1(PWM)
Watchdog timer
ADC
AV
SS
Interrupt
KS57C4104
SAM47
4 K bytes
256 nibbles
35 (4 input only)
None
8-bit SIO x 1
8-bit timer/counter
8-bit timer/counter
(8-bit PWM x 1)
Watch-dog
4 selectable interval
8-bit x 6
None
(2)
External x 3
Internal x 5
Quasi x 2 (KS0–KS3)
Stop/Idle
Crystal, Ceramic, RC
0.4–6 MHz
1.8–5.5 V
OTP
42SDIP/44QFP
Same
Same
21 (3 input only)
None
Same
Same
Same
Same
8-bit x 4
Same
External x 2
Internal x 5
Quasi x 1 ( – )
Same
Same
Same
1.8–5.5 V
Same
30SDIP/28SOP
KS57C4204
SAM47
Same
Same
35 (4 input only)
Built in/ Typ: 2.0 V
Same
Same
Same
Same
8-bit x 6
Same
External x 3
Internal x 5
Quasi x 2 (KS0–KS3)
Same
Same
Same
2.5–5.5 V
Same
42SDIP/44QFP
KS57C4304
SAM47
Power down
Oscillator
Operating frequency
Operating voltage
OTP/MTP
Package
NOTES
1. POR (power on reset)/Typ 2.0 V low voltage detector.
2. Internal A/D converter ground (bonded to V
SS
internally)
1-3
PRODUCT OVERVIEW
KS57C4104/P4104/C4204/P4204/C4304/P4304
BLOCK DIAGRAM
INT0, INT1, INT2,INT4
8-BIT
TIMER/
COUNTER 0
RESET
BASIC
TIMER
X
IN
X
OUT
WATCH
TIMER
8-BIT
TIMER/
COUNTER 1
INTERRUPT
CONTROL
BLOCK
CLOCK
INSTRUCTION
REGISTER
2
I/O PORT 0
P0.0/
SCK
P0.1/SO
P0.2/SI
P0.3/BUZ
P4.0-4.3
P5.0-5.3
P6.0/KS0
P6.1/KS1
P6.2/KS2
P6.3/KS3
P7.0-7.3
P8.0/TCL0
P8.1/TCLO0
P8.2
I/O PORT 4
I/O PORT 5
INTERNAL
INTERRUPTS
INSTRUCTION DECODER
ARITHMETIC
AND
LOGIC UNIT
PROGRAM
COUNTER
SERIAL
I/O
P1.0/INT0
P1.1/INT1
P1.2/INT2
P1.3/INT4
P2.0-P2.3/
AD0-AD3
PROGRAM
STATUS WORD
INPUT
PORT 1
I/O PORT 2
STACK
POINTER
A/D
CONVERTER
I/O PORT 6
I/O PORT 7
AV
REF
P3.0/AD4
P3.1/AD5
P3.2/CLO/TCL1
P3.3/PWM / TCLO1
I/O PORT 8
256 x 4-BIT
DATA
MEMORY
4 K BYTE
PROGRAM
MEMORY
I/O PORT 3
Figure 1-1. KS57C4104/C4204/C4304 Simplified Block Diagram
1-4
KS57C4104/P4104/C4204/P4204/C4304/P4304
PRODUCT OVERVIEW
PIN ASSIGNMENTS
P2.0/AD0
P2.1/AD1
P2.2/AD2
P2.3/AD3
P3.0/AD4
P3.1/AD5
AV
REF
P3.2/CLO/TCL1
P3.3/PWM/TCLO1
P4.0
V
DD
V
SS
X
OUT
X
IN
TEST
P4.1
P4.2
RESET
P4.3
P5.0
P5.1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
P8.2
P8.1/TCLO0
P8.0/TCL0
P7.3
P7.2
P7.1
P7.0
P6.3/KS3
P6.2/KS2
P6.1/KS1
P6.0/KS0
P1.3/INT4
P1.2/INT2
P1.1/INT1
P1.0/INT0
P0.3/BUZ
P0.2/SI
P0.1/SO
P0.0/
SCK
P5.3
P5.2
Figure 1-2. KS57C4104 Pin Assignment (42-SDIP)
KS57C4104
42 SDIP
1-5
嵌入式系统
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