GS72108TP/J
SOJ, TSOP
Commercial Temp
Industrial Temp
Features
• Fast access time: 8, 10, 12, 15 ns
• CMOS low power operation: 150/125/110/90 mA at
minimum cycle time.
• Single 3.3 V ± 0.3 V power supply
• All inputs and outputs are TTL-compatible
• Fully static operation
• Industrial Temperature Option: –40° to 85°C
• Package line up
J: 400 mil, 36-pin SOJ package
TP: 400 mil, 44-pin TSOP Type II package
256K x 8
2Mb Asynchronous SRAM
A
4
A
3
A
2
A
1
A
0
CE
DQ
1
DQ
2
V
DD
V
SS
DQ
3
DQ
4
WE
A
17
A
16
A
15
A
14
A
13
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
8, 10, 12, 15 ns
3.3 V V
DD
Center V
DD
and V
SS
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
NC
A
5
A
6
A
7
A
8
OE
DQ
8
DQ
7
V
SS
V
DD
DQ
6
DQ
5
A
9
A
10
A
11
A
12
NC
NC
SOJ 256K x 8-Pin Configuration
36-pin
400 mil SOJ
Description
The GS72108 is a high speed CMOS Static RAM organized as
262,144 words by 8 bits. Static design eliminates the need for
external clocks or timing strobes. The GS operates on a single
3.3 V power supply and all inputs and outputs are TTL-com-
patible. The GS72108 is available in 400 mil SOJ and 400 mil
TSOP Type-II packages.
Pin Descriptions
Symbol
A
0
–A
17
DQ
1
–DQ
8
CE
WE
OE
V
DD
V
SS
NC
Description
Address input
Data input/output
Chip enable input
Write enable input
Output enable input
+3.3 V power supply
Ground
No connect
Rev: 1.08 7/2002
1/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS72108TP/J
TSOP-II 256K x 8-Pin Configuration
NC
NC
A
4
A
3
A
2
A
1
A
0
CE
DQ
1
DQ
2
V
DD
V
SS
DQ
3
DQ
4
WE
A
17
A
16
A
15
A
14
A
13
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
NC
NC
NC
A
5
A
6
A
7
A
8
OE
DQ
8
DQ
7
V
SS
V
DD
DQ
6
DQ
5
A
9
A
10
A
11
A
12
NC
NC
NC
NC
44-pin
400 mil TSOP II
Block Diagram
A
0
Address
Input
Buffer
Row
Decoder
Memory Array
A
17
CE
WE
OE
Column
Decoder
Control
I/O Buffer
DQ
1
DQ
8
Rev: 1.08 7/2002
2/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS72108TP/J
Truth Table
CE
H
L
L
L
Note: X: “H” or “L”
OE
X
L
X
H
WE
X
H
L
H
DQ
1
to DQ
8
Not Selected
Read
Write
High Z
V
DD
Current
ISB
1
, ISB
2
I
DD
Absolute Maximum Ratings
Parameter
Supply Voltage
Input Voltage
Output Voltage
Allowable power dissipation
Storage temperature
Symbol
V
DD
V
IN
V
OUT
PD
T
STG
Rating
–0.5
to +4.6
–0.5
to V
DD
+0.5
(≤ 4.6 V max.)
–0.5
to V
DD
+0.5
(≤ 4.6 V max.)
0.7
–55
to 150
Unit
V
V
V
W
o
C
Note:
Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Rec-
ommended Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device
reliability.
Rev: 1.08 7/2002
3/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS72108TP/J
Recommended Operating Conditions
Parameter
Supply Voltage for -10/12/15
Supply Voltage for -8
Input High Voltage
Input Low Voltage
Ambient Temperature,
Commercial Range
Ambient Temperature,
Industrial Range
Symbol
V
DD
V
DD
V
IH
V
IL
T
Ac
T
A
I
Min
3.0
3.135
2.0
–0.3
0
–40
Typ
3.3
3.3
—
—
—
—
Max
3.6
3.6
V
DD
+0.3
0.8
70
85
Unit
V
V
V
V
o
C
o
C
Note:
1. Input overshoot voltage should be less than V
DD
+2 V and not exceed 20 ns.
2. Input undershoot voltage should be greater than –2 V and not exceed 20 ns.
Capacitance
Parameter
Input Capacitance
Output Capacitance
Symbol
C
IN
C
OUT
Test Condition
V
IN
= 0 V
V
OUT
= 0 V
Max
5
7
Unit
pF
pF
Notes:
1. Tested at T
A
= 25°C, f = 1 MHz
2. These parameters are sampled and are not 100% tested.
DC I/O Pin Characteristics
Parameter
Input Leakage
Current
Output Leakage
Current
Output High Voltage
Output Low Voltage
Symbol
I
IL
I
LO
V
OH
V
OL
Test Conditions
V
IN
= 0 to V
DD
Output High Z
V
OUT
= 0 to V
DD
I
OH
= –4mA
I
LO
= +4mA
Min
–
1 uA
–1
uA
2.4
—
Max
1 uA
1 uA
—
0.4 V
Rev: 1.08 7/2002
4/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS72108TP/J
Power Supply Currents
Parameter
Symbol
Test Conditions
CE
≤
V
IL
All other inputs
≥
V
IH
or
≤
V
IL
Min. cycle time
I
OUT
= 0 mA
CE
≥
V
IH
All other inputs
≥
V
IH
or
≤V
IL
Min. cycle time
CE
≥
V
DD
- 0.2 V
All other inputs
≥
V
DD
–
0.2 V or
≤
0.2 V
0 to 70°C
8 ns
10 ns
12 ns
15 ns
10 ns
–40
to 85°C
12 ns
15 ns
Operating
Supply
Current
I
DD
(max)
150 mA
125 mA
110 mA
90 mA
135 mA
120 mA
100 mA
Standby
Current
I
SB1
(max)
55 mA
50 mA
45 mA
40 mA
60 mA
55 mA
50 mA
Standby
Current
I
SB2
(max)
15 mA
25 mA
AC Test Conditions
Parameter
Input high level
Input low level
Input rise time
Input fall time
Input reference level
Output reference level
Output load
Conditions
V
IH
= 2.4 V
V
IL
= 0.4 V
tr = 1 V/ns
tf = 1 V/ns
1.4 V
1.4 V
Fig. 1& 2
Output Load 1
DQ
50Ω
VT = 1.4 V
30pF
1
Output Load 2
3.3 V
DQ
5pF
1
589Ω
434Ω
Note:
1. Include scope and jig capacitance.
2. Test conditions as specified with output loading as shown in
Fig. 1
unless otherwise noted.
3. Output load 2 for t
LZ
, t
HZ
, t
OLZ
and t
OHZ
Rev: 1.08 7/2002
5/12
© 1999, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
TI技术论坛
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
