KS57C2308/P2308/C2316/P2316
PRODUCT OVERVIEW
1
OVERVIEW
PRODUCT OVERVIEW
The KS57C2308/C2316 single-chip CMOS microcontroller has been designed for high performance using
Samsung's newest 4-bit CPU core, SAM47 (Samsung Arrangeable Microcontrollers).
With features such as LCD direct drive capability, 8-bit timer/counter, and serial I/O, the KS57C2308/C2316 offer
an excellent design solution for a wide variety of applications that require LCD functions.
Up to 40 pins of the 80-pin QFP package can be dedicated to I/O. Six vectored interrupts provide fast response
to internal and external events. In addition, the KS57C2308/C2316's advanced CMOS technology provides for
low power consumption and a wide operating voltage range.
OTP
The KS57C2308/C2316 microcontroller is also available in OTP (One Time Programmable) version,
KS57P2308/P2316. KS57P2308/P2316 microcontroller has an on-chip 8/16-Kbyte one-time-programmable
EPROM instead of masked ROM. The KS57P2308/P2316 is comparable to KS57C2308/C2316, both in function
and in pin configuration.
1-1
PRODUCT OVERVIEW
KS57C2308/P2308/C2316/P2316
FEATURES
Memory
–
–
–
512
×
4-bit RAM
8 K
×
8-bit ROM (KS57C2308/P2308)
16 K
×
8-bit ROM (KS57C2316/P2316)
Bit Sequential Carrier
–
Support 16-bit serial data transfer in arbitrary
format
Interrupts
–
–
–
Three internal vectored interrupts
Three external vectored interrupts
Two quasi-interrupts
I/O Pins
–
–
–
Input only: 8 pins
I/O: 24 pins
Output: 8 pins sharing with segment driver
outputs
Memory-Mapped I/O Structure
–
Data memory bank 15
LCD Controller/Driver
–
–
–
Maximum 16-digit LCD direct drive capability
32 segment, 4 common pins
Display modes: Static, 1/2 duty (1/2 bias),
1/3 duty (1/2 or 1/3 bias), 1/4 duty (1/3 bias)
Two Power-Down Modes
–
–
Idle mode (only CPU clock stops)
Stop mode (main or sub system oscillation stops)
8-Bit Basic Timer
–
–
Programmable interval timer
Watchdog timer
Oscillation Sources
–
–
–
–
–
Crystal, ceramic, or RC for main system clock
Crystal or external oscillator for subsystem clock
Main system clock frequency: 4.19 MHz (typical)
Subsystem clock frequency: 32.768 kHz
CPU clock divider circuit (by 4, 8, or 64)
8-Bit Timer/Counter 0
–
–
–
–
Programmable 8-bit timer
External event counter
Arbitrary clock frequency output
Serial I/O interface clock generator
Instruction Execution Times
–
–
0.95, 1.91, 15.3 µs at 4.19 MHz (main)
122 µs at 32.768 kHz (subsystem)
Watch Timer
–
–
–
Real-time and interval time measurement
Four frequency outputs to BUZ pin
Clock source generation for LCD
Operating Temperature
–
– 40
°
C to 85
°
C
8-Bit Serial I/O Interface
–
–
–
–
8-bit transmit/receive mode
8-bit receive only mode
LSB-first or MSB-first transmission selectable
Internal or external clock source
Operating Voltage Range
–
1.8 V to 5.5 V
Package Type
–
80-pin QFP
1-
2
KS57C2308/P2308/C2316/P2316
PRODUCT OVERVIEW
BLOCK DIAGRAM
Watch-Dog
Timer
Basic
Timer
Watch
Timer
P2.3/BUZ
BIAS
VLC0-VLC2
LCDCK/P3.0
LCDSY/P3.1
COM0-COM3
SEG0-SEG23
P8.0-P8.7/
SEG24-SEG31
P0.0/INT4
P0.1/SCK
P0.2/SO
P0.3/SI
P1.0/INT0
P1.1/INT1
P1.2/INT2
P1.3/TCL0
P2.0/TCLO0
P2.1
P2.2/CLO
P2.3/BUZ
P3.0/LCDCK
P3.1/LCDSY
P3.2
P3.3
INT0, INT1,INT2
RESET
P1.3/TCL0
P2.0/TCLO0
XIN
XTIN
XOUT
XTOUT
LCD Drive/
Controller
8-Bit Timer/
Counter 0
Interrupt
Control
Block
Clock
Instruction
Register
P4.0-P4.3
P5.0-P5.3
I/O Port 3
I/O Port 4
4-Bit
Accumulator
Internal
Interrupts
I/O Port 0
Program
Counter
P6.0-P6.3/
KS0-KS3
P7.0-P7.3/
KS4-KS7
I/O Port 6
I/O Port 7
Instruction Decoder
Program
Status Word
Input Port 1
FLAGS
Arithmetic and Logic Unit
Stack
Pointer
I/O Port 2
P8.0-P8.7/
SEG24-SEG31
I/O Port 8
I/O Port 3
512 x 4-Bit
Data
Memory
8/16-Kbyte
Program
Memory
Serial I/O
Port
P0.1 P0.2 P0.3
/SCK /SO /SI
Figure 1-1. KS57C2308/C2316 Simplified Block Diagram
1-3
PRODUCT OVERVIEW
KS57C2308/P2308/C2316/P2316
PIN ASSIGNMENTS
SEG2
SEG1
SEG0
COM0
COM1
COM2
COM3
BIAS
VLC0
VLC1
VLC2
VDD
VSS
XOUT
XIN
TEST
XTIN
XTOUT
RESET
P0.0/INT4
P0.1/SCK
P0.2/SO
P0.3/SI
P1.0/INT0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
KS57C2308
KS57C2316
(TOP VIEW)
SEG19
SEG20
SEG21
SEG22
SEG23
P8.0/SEG24
P8.1/SEG25
P8.2/SEG26
P8.3/SEG27
P8.4/SEG28
P8.5/SEG29
P8.6/SEG30
P8.7/SEG31
P7.3/KS7
P7.2/KS6
P7.1/KS5
P7.0/KS4
P6.3/KS3
P6.2/KS2
P6.1/KS1
P6.0/KS0
P5.3
P5.2
P5.1
Figure 1-2. KS57C2308/C2316 80-QFP Pin Assignment Diagram
1-
4
P1.1/INT1
P1.2/INT2
P1.3/TCL0
P2.0/TCLO0
P2.1
P2.2/CLO
P2.3/BUZ
P3.0/LCDCK
P3.1/SCDSY
P3.2
P3.3
P4.0
P4.1
P4.2
P4.3
P5.0
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
KS57C2308/P2308/C2316/P2316
PRODUCT OVERVIEW
PIN DESCRIPTIONS
Table 1-1. KS57C2308/C2316 Pin Descriptions
Pin Name
P0.0
P0.1
P0.2
P0.3
P1.0
P1.1
P1.2
P1.3
P2.0
P2.1
P2.2
P2.3
P3.0
P3.1
P3.2
P3.3
P4.0–
P4.3
P5.0–
P5.3
P6.0–
P6.3
P7.0–
P7.3
Pin
Type
I
I/O
I/O
I
I
Description
4-bit input port.
1-bit and 4-bit read and test are possible.
4-bit pull-up resistors are software assignable.
4-bit input port.
1-bit and 4-bit read and test are possible.
4-bit pull-up resistors are software assignable.
4-bit I/O port.
1-bit and 4-bit read/write and test are possible.
4-bit pull-up resistors are software assignable.
4-bit I/O port.
1-bit and 4-bit read/write and test are possible.
Each individual pin can be specified as input
or output. 4-bit pull-up resistors are software
assignable.
4-bit I/O ports. N-channel open-drain output up
to 5 V. 1-, 4-, and 8-bit read/write and test are
possible. Ports 4 and 5 can be paired to
support 8-bit data transfer. 4-bit pull-up
resistors are software assignable.
4-bit I/O ports. Port 6 pins are individually
software configurable as input or output. 1-bit
and 4-bit read/write and test are possible. 4-bit
pull-up resistors are software assignable. Ports
6 and 7 can be paired to enable 8-bit data
transfer.
Output port for 1-bit data (for use as CMOS
driver only)
LCD segment signal output
LCD segment signal output
LCD common signal output
LCD power supply. Voltage dividing resistors
are assignable by mask option
LCD power control
LCD clock output for display expansion
Number
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36–43
Share
Pin
INT4
SCK
Reset
Value
Input
Circuit
Type
A-1
D
*
D
*
A-1
A-1
SO
SI
INT0
INT1
INT2
TCL0
TCLO0
–
CLO
BUZ
LCDCK
LCDSY
Input
I/O
Input
D
I/O
Input
D
I/O
–
Input
E
I/O
44–51
KS0–KS3
KS4–KS7
Input
D
*
P8.0–
P8.7
SEG0–
SEG23
SEG24–
SEG31
COM0–
COM3
V
LC0
–V
LC2
BIAS
LCDCK
O
O
O
O
–
–
I/O
59–52
3–1,
80–60
59–52
4–7
9–11
8
32
SEG24–
SEG31
–
P8.0–P8.7
–
SCLK
SDAT
–
P3.0
Output
Output
Output
Output
–
–
Input
H-16
H-15
H-16
H-15
–
–
D
1-5