HCPL-3700 AC/DC to Logic Interface Optocoupler
April 2007
HCPL-3700
AC/DC to Logic Interface Optocoupler
Features
■
AC or DC input
■
Programmable sense voltage
■
Logic level compatibility
■
Threshold guaranteed over temperature (0°C to 70°C)
■
Optoplanar™ construction for high common mode
tm
Description
The HCPL-3700 voltage/current threshold detection
optocoupler consists of an AlGaAs LED connected to a
threshold sensing input buffer IC which are optically cou-
pled to a high gain darlington output. The input buffer
chip is capable of controlling threshold levels over a wide
range of input voltages with a single resistor. The output
is TTL and CMOS compatible.
immunity
■
UL recognized (file # E90700)
■
VDE certified – ordering option ‘V’, e.g., HCPL3700V
Applications
■
Low voltage detection
■
5 V to 240 V AC/DC voltage sensing
■
Relay contact monitor
■
Current sensing
■
Microprocessor Interface
■
Industrial controls
Schematic
Package
AC
DC+
DC-
AC
1
2
3
4
8
7
6
5
V
CC
8
NC
1
V
O
GND
8
1
8
1
TRUTH TABLE
(Positive Logic)
Input
H
L
Output
L
H
AC/DC
POWER
R
X
HCPL-3700
LOGIC
A 0.1 µF bypass capacitor must
be connected between pins 8
and 5.
GND 1
GND 2
©2005 Fairchild Semiconductor Corporation
HCPL-3700 Rev. 1.0.1
www.fairchildsemi.com
HCPL-3700 AC/DC to Logic Interface Optocoupler
Absolute Maximum Ratings
(No derating required up to 70°C)
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
T
STG
T
OPR
T
SOL
EMITTER
I
IN
Input Current
Storage Temperature
Operating Temperature
Lead Solder Temperature
Parameter
Value
-55 to +125
-40 to +85
260 for 10 sec
50 (Max.)
140 (Max.)
500 (Max.)
-0.5 (Max.)
230 (Max.)
305 (Max.)
30 (Max.)
-0.5 to 20
-0.5 to 20
210 (Max.)
Units
°C
°C
°C
mA
Average
Surge, 3ms, 120Hz Pulse Rate
Transient, 10µs, 120Hz Pulse Rate
V
IN
P
IN
P
T
DETECTOR
I
O
V
CC
V
O
P
O
Input Voltage (Pins 2-3)
Input Power Dissipation
(1)
Total Package Power Dissipation
(2)
Output Current (Average)
(3)
Supply Voltage (Pins 8-5)
Output Voltage (Pins 6-5)
Output Power Dissipation
(4)
V
mW
mW
mA
V
V
mW
Notes:
1. Derate linearly above 70°C free-air temperature at a rate of 1.8 mW/°C.
2. Derate linearly above 70°C free-air temperature at a rate of 2.5 mW/°C.
3. Derate linearly above 70°C free-air temperature at a rate of 0.6 mA/°C.
4. Derate linearly above 70°C free-air temperature at a rate of 1.9 mW/°C.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
V
CC
T
A
f
Parameter
Supply Voltage
Operating Temperature
Operating Frequency
Min.
2
0
0
Max.
18
70
4
Units
V
°C
kHz
©2005 Fairchild Semiconductor Corporation
HCPL-3700 Rev. 1.0.1
www.fairchildsemi.com
2
HCPL-3700 AC/DC to Logic Interface Optocoupler
Electrical Characteristics
(T
A
= 0°C to 70°C Unless otherwise specified)
Symbol
I
TH+
I
TH-
V
TH+
Input Threshold
Voltage
DC
(Pins 2,3)
Parameter
Input Threshold Current
Test Conditions
V
IN
= V
TH+
, V
CC
= 4.5 V
V
O
= 0.4 V, I
O
≥
4.2mA
(5)
V
IN
= V
2
– V
3
(Pins 1 & 4 Open)
V
CC
= 4.5 V, V
O
= 0.4V
(5)
I
O
≥
4.2mA
V
IN
= V
2
- V
3
(Pins 1 & 4 Open)
V
CC
= 4.5 V, V
O
= 2.4 V
(5)
I
O
≥
100µA
Min.
1.96
1.00
3.35
Typ.
2.4
1.2
3.8
Max.
3.11
1.62
4.05
Unit
mA
mA
V
V
TH-
2.01
2.5
2.86
V
V
TH+
AC
(Pins 1,4)
|V
IN
= V
1
– V
4
| (Pins 2 & 3 Open)
V
CC
= 4.5 V, V
O
= 0.4 V
(5)
I
O
≥
4.2 mA
|V
IN
= |V
1
- V
4
| (Pins 2 & 3 Open)
V
CC
= 4.5 V, V
O
= 2.4 V
(5)
I
O
≤
100µA
4.23
5.0
5.50
V
V
TH-
2.87
3.7
4.20
V
I
HYS
V
HYS
V
IHC1
Hysteresis
Input Clamp Voltage
I
HYS
= I
TH+
– I
TH-
V
HYS
= V
TH+
– V
TH-
V
IHC1
= V
2
- V
3
, V
3
= GND
I
IN
= 10 mA,
Pins 1 & 4 connected to Pin 3
V
IHC2
= |V
1
– V
4
|, |I
IN
| = 10mA
(Pins 2 & 3 Open)
V
IHC3
= V
2
– V
3
, V
3
= GND,
I
IN
= 15mA (Pins 1 & 4 Open)
V
ILC
= V
2
– V
3
, V
3
= GND,
I
IN
= -10mA
5.4
1.2
1.3
6.3
6.6
mA
V
V
V
IHC2
V
IHC3
V
ILC
I
IN
V
D1,2
V
D3,4
V
OL
I
OH
I
CCL
I
CCH
C
IN
Input Current
Bridge Diode
Forward Voltage
Logic LOW Output Voltage
Logic HIGH Output Current
Logic LOW Supply Current
Logic HIGH Supply Current
Input Capacitance
6.1
7.0
12.5
-0.75
7.3
13.4
V
V
V
V
IN
= V
2
– V
3
= 5.0V
(Pins 1 & 4 Open)
I
IN
= 3mA
I
IN
= 3mA
V
CC
= 4.5 V, I
OL
= 4.2mA
(5)
V
OH
= V
CC
= 18V
(5)
V
2
– V
3
= 5.0V, V
O
= Open,
V
CC
= 5V
V
CC
= 18V, V
O
= Open
f = 1MHz, V
IN
= 0V
(Pins 2 & 3, Pins 1 & 4 Open)
3.0
3.7
0.65
0.65
0.04
1.0
0.01
50
4.4
mA
V
V
0.4
100
4
4
V
µA
mA
µA
pF
Note:
5. Logic LOW output level at pin 6 occurs when V
IN
≥
V
TH+
and when V
IN
> V
TH-
once V
IN
exceeds V
TH+
.
Logic HIGH output level at pin 6 occurs when V
IN
≤
V
TH-
and when V
IN
< V
TH+
once V
IN
decreases below V
TH-
.
©2005 Fairchild Semiconductor Corporation
HCPL-3700 Rev. 1.0.1
www.fairchildsemi.com
3
HCPL-3700 AC/DC to Logic Interface Optocoupler
Switching Characteristics
(T
A
= 25°C, V
CC
= 5 V Unless otherwise specified)
Symbol
T
PHL
T
PLH
t
r
t
f
|CM
H
|
|CM
L
|
AC Characteristics
Propagation Delay Time
(to Output Low Level)
Propagation Delay Time
(to Output High Level)
Output Rise Time (10–90%)
Output Fall Time (90–10%)
Common Mode Transient
Immunity (at Output High Level)
Common Mode Transient
Immunity (at Output Low Level)
Test Conditions
R
L
= 4.7kΩ, C
L
= 30pF
(6)
R
L
= 4.7kΩ, C
L
= 30pF
(6)
R
L
= 4.7kΩ, C
L
= 30pF
R
L
= 4.7kΩ, C
L
= 30pF
I
IN
= 0 mA, R
L
= 4.7kΩ,
V
O min
= 2.0 V, V
CM
= 1400V
(7)(8)
I
N
= 3.11mA, R
L
= 4.7kΩ,
V
O max
= 0.8V, V
CM
= 140V
(7)(8)
Min.
Typ.
6.0
25.0
45
0.5
4000
600
Max.
15
40
Unit
µs
µs
µs
µs
V/µs
V/µs
Package Characteristics
(T
A
= 0°C to 70°C Unless otherwise specified)
Symbol
V
ISO
Characteristics
Withstand Insulation Voltage
Test Conditions
Relative humidity < 50%,
T
A
= 25°C, t = 1 min,
I
I-O
≤
2µA
(9)(10)
V
IO
= 500Vdc
(9)
f = 1MHz, V
IO
= 0Vdc
Min.
2500
Typ.
Max.
Unit
V
RMS
R
I-O
C
I-O
Notes:
6.
Resistance (input to output)
Capacitance (input to output)
10
12
0.6
Ω
pF
T
PHL
propagation delay is measured from the 2.5V level of the leading edge of a 5.0V input pulse (1µs rise time) to
the 1.5 V level on the leading edge of the output pulse. T
PLH
propagation delay is measured on the trailing edges
of the input and output pulse. (Refer to Fig. 9)
Common mode transient immunity in logic high level is the maximum tolerable (positive) dV
cm
/dt on the leading
edge of the common mode pulse signal V
CM
, to assure that the output will remain in a logic high state (i.e., V
O
>
2.0 V). Common mode transient immunity in logic low level is the maximum tolerable (negative) dV
cm
/dt on the
trailing edge of the common mode pulse signal, V
CM
, to assure that the output will remain in a logic low state
(i.e., V
O
< 0.8 V). Refer to Fig. 10.
In applications where dV
cm
/dt may exceed 50,000 V/µs (Such as static discharge), a series resistor, R
CC
,
should be included to protect the detector chip from destructive surge currents. The recommended value for
R
CC
is 240V per volt of allowable drop in V
CC
(between pin 8 and V
CC
) with a minimum value of 240Ω.
Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are
shorted together.
7.
8.
9.
10. The 2500 V
RMS
/1 min. capability is validated by a 3.0 kV
RMS
/1 sec. dielectric voltage withstand test.
11. AC voltage is instantaneous voltage for V
TH+
& V
TH-
.
12. All typicals at T
A
= 25°C, V
CC
= 5V unless otherwise specified.
©2005 Fairchild Semiconductor Corporation
HCPL-3700 Rev. 1.0.1
www.fairchildsemi.com
4
HCPL-3700 AC/DC to Logic Interface Optocoupler
Typical Performance Curves
Fig. 1 Logic Low Supply Current vs. Operating Supply Voltage
I
CCL
- LOGIC LOW SUPPLY CURRENT (mA)
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
-5
0.0
4
6
8
10
12
14
16
18
20
-10
0
2
4
6
8
10
12
14
50
45 DC (Pins 1,2 shorted together
pins 3,4 shorted together)
40
Fig. 2 Input Current vs. Input Voltage
I
IN
- INPUT CURRENT (mA)
DC (Pins 1 & 4 Open)
35
30
25
20
15
10
5
0
AC (pins 2 & 3 Open)
V
CC
- OPERATING SUPPLY VOLTAGE (V)
V
IN
- INPUT VOLTAGE (V)
Fig. 3 Input Current/Low Level Output Voltage
vs. Temperature
4.2
4.0
3.8
120
4.2
Fig. 4 Current Threshold/Voltage Threshold
vs. Temperature
3.2
V
TH
(DC) - VOLTAGE THRESHOLD (V)
110
100
90
I
IN
V
IN
= 5.0 V
(PINS 2 and 3)
V
CC
= 5.0 V
80
70
60
50
40
V
OL
V
CC
= 5.0 V
I
OL
= 4.2 mA
30
20
10
-20
0
25
45
65
0
85
3.8
3.6
3.4
3.2
3.0
2.8
2.6
2.4
2.2
2.0
1.8
-40
-20
0
25
45
65
85
I
TH
-
V
TH
-
I
TH
+
V
TH
+
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
Input Current, I
IN
(mA)
3.6
3.4
3.2
3.0
2.8
2.6
2.4
2.2
2.0
1.8
-40
T
A
- TEMPERATURE (°C)
T
A
- TEMPERATURE (°C)
Fig. 5 Propagation Delay vs. Temperature
70
100
90
60
80
Fig. 6 Rise and Fall Time vs. Temperature
0.8
0.7
0.6
T
P
- PROPAGATION DELAY (µs)
Tf
Tr - RISE TIME (µs)
40
TPLH
30
TPHL
20
60
50
40
30
0.5
0.4
0.3
0.2
20
10
10
0
-60
0
-40
Tr
0.1
0.0
-20
0
25
45
65
85
-40
-20
0
20
40
60
80
100
T
A
- TEMPERATURE (°C)
T
A
- TEMPERATURE (°C)
©2005 Fairchild Semiconductor Corporation
HCPL-3700 Rev. 1.0.1
www.fairchildsemi.com
5
Tf - FALL TIME (µs)
50
70
I
TH
(DC) - CURRENT THRESHOLD (mA)
4.0
3.0
V
OL
(mV)
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