LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
DESCRIPTION
The HCPL-0700 and HCPL-0701 optocouplers consist of an AlGaAs
LED optically coupled to a high gain split darlington photodetector
housed in a compact 8-pin small outline package.
The split darlington configuration separating the input photodiode
and the first stage gain from the output transistor permits lower out-
put saturation voltage and higher speed operation than possible with
conventional darlington phototransistor optocoupler.
The combination of a very low input current of 0.5 mA and a high
current transfer ratio of 2000% makes this family particularly useful
for input interface to MOS, CMOS, LSTTL and EIA RS232C, while
output compatibility is ensured to CMOS as well as high fan-out TTL
requirements.
SINGLE-CHANNEL
HCPL-0700
HCPL-0701
Package Dimensions
•
•
•
•
•
Low current - 0.5 mA
Superior CTR-2000%
Superior CMR-10 kV/µs
CTR guaranteed 0-70°C
*BSI, CSA and UL approval
SEATING PLANE
FEATURES
0.164 (4.16)
0.144 (3.66)
Pin 1
0.202 (5.13)
0.182 (4.63)
0.019 [0.48]
N/C 1
8 V
CC
0.143 (3.63)
0.123 (3.13)
0.010 (0.25)
0.006 (0.16)
+ 2
7 V
B
APPLICATIONS
•
•
•
•
•
•
Digital logic ground isolation
Telephone ring detector
EIA-RS-232C line receiver
High common mode noise line receiver
µP bus isolation
Current loop receiver
V
F
_
3
6 V
O
0.021 (0.53)
0.011 (0.28)
0.008 (0.20)
0.003 (0.08)
0.050 (1.27)
TYP
0.244 (6.19)
0.224 (5.69)
N/C 4
5 GND
Lead Coplanarity : 0.004 (0.10) MAX
HCPL-0700 / HCPL-0701
NOTE
All dimensions are in inches (millimeters)
ABSOLUTE MAXIMUM RATINGS
(T
A
= 25°C unless otherwise specified)
Symbol
T
STG
T
OPR
Value
-55 to +125
-55 to +85
Units
°C
°C
Parameter
Storage Temperature
Operating Temperature
Reflow Temperature Profile (Refer to fig. 11)
EMITTER
DC/Average Forward Input Current
Peak Forward Input Current (50% duty cycle, 1 ms P.W.)
Peak Transient Input Current - ( 1 µs P.W., 300 pps)
Reverse Input Voltage
Input Power Dissipation
DETECTOR
Average Output Current (Pin 6)
Emitter-Base Reverse Voltage
Supply Voltage, Output Voltage
Output power dissipation
*Samples submitted for certification - Approval pending
HCPL-0700
HCPL-0701
I
F
(avg)
I
F
(pk)
I
F
(trans)
V
R
P
D
I
O
(avg)
V
EBR
V
CC,
V
O
P
D
20
40
1.0
5
35
60
0.5
-0.5 to 7
-0.5 to 18
100
mA
mA
A
V
mW
mA
V
V
mW
2001 Fairchild Semiconductor Corporation
DS300394
3/5/01
1 OF 9
www.fairchildsemi.com
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE-CHANNEL
HCPL-0700
HCPL-0701
ELECTRICAL CHARACTERISTICS
Parameter
EMITTER
Input Forward Voltage
Input Reverse Breakdown Voltage
(T
A
= 0 to 70°C unless otherwise specified.)
INDIVIDUAL COMPONENT CHARACTERISTICS
Test Conditions
T
A
=25°C)
(I
F
= 1.6 mA)
(T
A
= 25°C, I
R
= 10 µA)
(I
F
= 1.6 mA)
Symbol
V
F
BV
R
( V
F
/ T
A
)
I
OH
I
CCL
I
CCH
Device
All
All
All
HCPL-0701
HCPL-0700
HCPL-0700
HCPL-0701
HCPL-0700
HCPL-0701
Min
1.0
Typ**
1.27
Max
1.7
1.75
5.0
20
-1.8
0.01
0.01
0.4
0.05
100
250
1.5
10
mV/°C
µA
mA
µA
V
Unit
Temperature coefficient of forward voltage
DETECTOR
Logic high output current
Logic low supply
Logic high supply
(I
F
= 0 mA, V
O
= V
CC
= 18 V)
(I
F
= 0 mA, V
O
= V
CC
= 7 V)
(I
F
= 1.6 mA, V
O
= Open)
(V
CC
= 18 V)
(I
F
= 0 mA, V
O
= Open)
(V
CC
= 18 V)
TRANSFER CHARACTERISTICS
Parameter
COUPLED
Current transfer ratio
(Notes 1,2)
Logic low output voltage
output voltage
(Note 2)
(T
A
= 0 to 70°C Unless otherwise specified)
Test Conditions
Symbol
CTR
Device
HCPL-0701
HCPL-0701
HCPL-0700
Min
400
500
300
Typ**
2000
1300
1300
0.05
V
OL
HCPL-0701
0.10
0.13
0.20
HCPL-0700
0.08
Max
5000
2600
2600
0.4
0.4
0.4
0.4
0.4
V
%
Unit
(I
F
= 0.5 mA, V
O
= 0.4 V, V
CC
= 4.5 V)
(I
F
= 1.6 mA, V
O
= 0.4 V, V
CC
= 4.5 V)
(I
F
= 1.6 mA, V
O
= 0.4 V, V
CC
= 4.5 V)
(I
F
= 0.5 mA, I
O
= 2 mA, V
CC
= 4.5 V)
(I
F
= 1.6 mA, I
O
= 8 mA, V
CC
= 4.5 V)
(I
F
= 5 mA, I
O
= 15 mA, V
CC
= 4.5 V)
(I
F
= 12 mA, I
O
= 24 mA, V
CC
= 4.5 V)
(I
F
= 1.6 mA, I
O
= 4.8 mA, V
CC
= 4.5 V)
ISOLATION CHARACTERISTICS
Characteristics
Input-output
insulation leakage current
(RH
(T
A
= 0 to 70°C Unless otherwise specified)
Test Conditions
Symbol
Min
Typ**
Max
Unit
(Relative humidity = 45%)
(T
A
= 25°C, t = 5 s)
(V
I-O
= 3000 VDC)
(Note 4)
Withstand insulation test voltage
Resistance (input to output)
** All typicals at T
A
= 25°C
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3/5/01
DS300394
I
I-O
1.0
µA
50%, T
A
= 25°C)
(Note 4, 5) ( t = 1 min.)
(Note 4) (V
I-O
= 500 VDC)
V
ISO
R
I-O
2500
10
12
V
RMS
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE-CHANNEL
HCPL-0700
HCPL-0701
SWITCHING CHARACTERISTICS
Parameter
(T
A
= 0 to 70°C unless otherwise specified., V
CC
= 5 V)
Symbol
Device
HCPL-0701
T
PHL
HCPL-0701
HCPL-0700
HCPL-0701
T
PLH
HCPL-0701
HCPL-0700
HCPL-0700
|CM
H
|
HCPL-0701
HCPL-0700
|CM
L
|
HCPL-0701
1,000
10,000
V/µs
1,000
10,000
V/µs
Min
Typ**
4
0.2
1.5
12
1.3
7
Max
30
25
2
1
15
10
90
60
10
7
50
35
µs
µs
Unit
Test Conditions
(R
L
= 4.7 k , I
F
= 0.5 mA)
T
A
= 25°C
(R
L
= 270
, I
F
= 12 mA)
T
A
= 25°C
(R
L
= 2.2 k , I
F
= 1.6 mA)
T
A
= 25°C
(R
L
= 4.7 k , I
F
= 0.5 mA)
(R
L
= 4.7 k , I
F
= 0.5 mA) T
A
= 25°C
(R
L
= 270
, I
F
= 12 mA)
T
A
= 25°C
(R
L
= 2.2 k , I
F
= 1.6 mA)
T
A
= 25°C
Propagation delay
time to logic low
(Note 2) (Fig. 13)
Propagation delay
time to logic high
(Note 2) (Fig. 13)
Common mode
transient
immunity at
logic high
Common mode
transient
immunity at
logic low
(I
F
= 1.6 mA, V
CM
= 10 V
P-P,
R
L
= 2.2 k )
T
A
= 25°C (Note 3) (Fig. 14)
(I
F
= 0 mA, V
CM
= 10 V
P-P
)
T
A
= 25°C, (R
L
= 2.2 k ) (Note 3) (Fig. 14)
NOTES
1. Current Transfer Ratio is defined as a ratio of output collector current, I
O,
to the forward LED input current, I
F
, times 100%.
2. Pin 7 open. Use of a resistor between pins 5 and 7 will decrease gain and delay time.
3. Common mode transient immunity in logic high level is the maximum tolerable (positive) dV
cm
/dt on the leading edge of the
common mode pulse signal, V
CM
, to assure that the output will remain in a logic high state (i.e., V
O
2.0 V). Common mode
transient immunity in logic low level is the maximum tolerable (negative) dV
cm
/dt on the trailing edge of the common mode pulse
signal, V
CM
, to assure that the output will remain in a logic low state (i.e., V
O
0.8 V).
4. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted together.
5. 2500 VAC RMS for 1 minute duration is equivalent to 3000 VAC RMS for 1 second duration.
** All typicals at T
A
= 25°C
DS300394
3/5/01
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LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE-CHANNEL
HCPL-0700
HCPL-0701
ELECTRICAL CHARACTERISTICS
Current Limiting Resistor Calculations
R
1
(Non-Invert) = V
DD1
- V
DF
- V
OL1
I
F
R
1
(Invert) = V
DD1
- V
OH1
- V
DF
I
F
R
2
= V
DD2
- = V
OLX
(@ I
L
- I
2
)
I
L
(T
A
= 25°C unless otherwise specified)
INPUT
OUTPUT
CMOS CMOS
74XX 74LXX 74SXX 74LSXX 74HXX
@ 5 V @ 10 V
R2 ( ) R2 ( ) R2 ( ) R2 ( ) R2 ( ) R2 ( ) R2 ( )
Where:
V
DD1
- Input Supply Voltage
V
DD2
- Output Supply Voltage
V
DF
- Diode Forward Voltage
V
OL1
- Logic “0” Voltage of Driver
V
OH1
- Logic “1” Voltage of Driver
I
F
- Diode Forward Current
V
OLX
- Saturation Voltage of
Output Transistor
I
L
- Load Current Through
Resistor R2
I
2
- Input Current of Output Gate
NON-INV.
INV.
NON-INV.
INV.
NON-INV.
74XX
INV.
NON-INV.
74LXX
INV.
NON-INV.
74SXX
INV.
NON-INV.
74LSXX
INV.
NON-INV.
74HXX
INV.
CMOS
@5V
CMOS
@ 10 V
R1 ( )
2000
510
5100
4700
2200
180
1800
100
2000
360
2000
180
2000
180
1000
2200
750
1000
1000
1000
560
Fig. 1 Resistor Values for Logic Interface
V
DD1
V
DD2
V
DD2
1
2
3
IN
R
1
8
7
6
OUT
R
1
R
2
IN
1
2
3
4
8
7
6
5
R
2
OUT
4
5
Fig. 2 Non-Inverting Logic Interface
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Fig. 3 Inverting Logic Interface
3/5/01
DS300394
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
SINGLE-CHANNEL
HCPL-0700
HCPL-0701
Fig. 4 Propagation Delay vs. Temperature
35
30
V
CC
= 5 V
I
F
= 0.5 mA
R
L
= 4.7 kΩ
1/f = 50
µs
20
18
I
F
= 1.6 mA
V
CC
= 5 V
R
L
= 2.2 kΩ
1/f = 50
µs
Fig. 5 Propagation Delay vs. Temperature
t
p
- PROPAGATION DELAY (µs)
t
p
- PROPAGATION DELAY (µs)
t
PLH
t
PLH
16
14
12
10
8
6
4
25
20
15
10
5
t
PHL
0
-60
-40
-20
0
20
40
60
80
100
2
0
-60
-40
-20
0
20
40
60
80
t
PHL
100
T
A
- TEMPERATURE (˚C)
T
A
- TEMPERATURE (˚C)
Fig. 6 Propagation Delay vs. Temperature
I
F
= 12 mA
V
CC
= 5 V
R
L
= 270
Ω
1/f = 50
µs
Fig. 7 Logic High Output Current vs. Temperature
I
OH
- LOGIC HIGH OUTPUT CURRENT (nA)
1000
V
CC
= V
O
= 5.5 V
4
t
p
- PROPAGATION DELAY (µs)
t
PLH
3
100
10
2
1
1
t
PHL
0
-60
-40
-20
0
20
40
60
80
100
0.1
0.01
-40
-20
0
20
40
60
80
100
T
A
- TEMPERATURE (˚C)
T
A
- TEMPERATURE (˚C)
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3/5/01
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