Ordering number : EN*5087C
CMOS LSI
LC371100SP, SM, ST-10/20LV
1 MEG (131072 words× 8 bits) Mask ROM
Internal Clocked Silicon Gate
Preliminary
Overview
The LC371100SP, LC371100SM and LC371100ST are
131,072-word
×
8-bit organization (1,048,576-bit) mask
programmable read only memories.
The LC371100SP-10, LC371100SM-10 and
LC371100ST-10 feature an access time of 100 ns, an OE
access time of 40 ns, and a standby current of 30 µA, and
are optimal for use in 5-V systems that require high-speed
access.
The LC371100SP-20LV, LC371100SM-20LV and
LC371100ST-20LV feature an access time of 200 ns, an
OE access time of 80 ns, and a standby current of 4 µA.
Additionally, they provide high-speed access in 3.3-V
systems (3.0 to 3.6 V) with a 150-ns access time and a 60-
ns OE access time.
These ROMs adopt the JEDEC standard pin assignment
which allows them to replace EPROM easily. To prevent
bus line collisions in multi-bus microcontroller systems,
pin 24 can be mask programmed to be either active high or
active low.
Package Dimensions
unit: mm
3192-DIP32
[LC371100SP]
SANYO: DIP32
unit: mm
3205-SOP32
[LC371100SM]
Features
• 131072 words
×
8 bits organization
• Power supply
LC371100SP, SM, ST-10:
5.0 V ± 10%
LC371100SP, SM, ST-20LV: 2.7 to 3.6 V
• Fast access time (t
AA
, t
CA
)
LC371100SP, SM, ST-10:
100 ns (max.)
LC371100SP, SM, ST-20LV: 200 ns (max.)
150 ns (V
CC
= 3.0 to 3.6 V)
• Operating current
LC371100SP, SM, ST-10:
70 mA (max.)
LC371100SP, SM, ST-20LV: 20 mA (max.)
• Standby current
LC371100SP, SM, ST-10:
30 µA (max.)
LC371100SP, SM, ST-20LV: 5 µA (max.)
• Full static operation (internal clocked type)
• Fully TTL compatible (5 V supply)
• 3 state outputs
• JEDEC standard pin configuration
• Package type
LC371100SP-10/20LV: DIP32 (600 mil)
LC371100SM-10/20LV:SOP32 (525 mil)
LC371100ST-10/20LV: TSOP32 (8 mm
×
20 mm)
SANYO: SOP32
unit: mm
3224-TSOP32
[LC371100ST]
SANYO: TSOP32 (type-I)
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
43098HA (OT)/51195TH (OT)/41095TH (OT) No. 5087-1/5
LC371100SP, SM, ST-10/20LV
Pin Assignments
Pin Functions
A0 to A16
D0 to D7
CE/CE
OE/OE
V
CC
V
SS
Address input
Data output
Chip enable input
Output enable input
Power supply
Ground
Block Diagram
Truth Table
CE/CE
L/H
H/L
H/L
OE/OE
X
L/H
H/L
Output
High-impedance
High-impedance
DOUT
Current drain
Standby mode
Operating mode
Operating mode
X: H or L level should be offered.
No. 5087-2/5
LC371100SP, SM, ST-10/20LV
Specifications
Absolute Maximum Ratings
*1
Parameter
Maximum supply voltage
Supply input voltage
Supply output voltage
Allowable power dissipation
Operating temperature
Storage temperature
Symbol
V
CC
max
V
IN
V
OUT
Pd max
Topr
Tstg
Ta = 25°C; Reference values for the SANYO DIP package
Conditions
Ratings
–0.3 to +7.0
–0.3
*2
to V
CC
+ 0.3
–0.3 to V
CC
+ 0.3
1.0
0 to +70
–55 to +125
Unit
V
V
V
W
°C
°C
Note: 1. Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation should be restricted to Recommended
Operating Conditions.
2. V
IN
(min) = –3.0 V (pulse width
≤
30 ns)
Input/Output Capacitance*
at Ta = 25°C, f = 1.0 MHz
Parameter
Input capacitance
Output capacitance
Symbol
C
IN
C
OUT
Conditions
V
IN
= 0 V; Reference values for the SANYO DIP package
V
OUT
=
0 V; Reference values for the SANYO DIP package
Ratings
min
typ
max
8
10
Unit
pF
pF
Note:
*
This parameter is periodically sampled and not 100% tested.
3 V Operation
DC Recommended Operating Ranges
at Ta = 0 to +70°C
Parameter
Supply voltage
Input high level voltage
Input low level voltage
Symbol
V
CC
max
V
IH
V
IL
Conditions
Ratings
min
2.7
0.8 V
CC
–0.3
typ
3.0
max
3.6
V
CC
+ 0.3
+0.4
Unit
V
V
V
DC Electrical Characteristics
at Ta = 0 to +70°C, V
CC
= 2.7 to 3.6 V
Parameter
Symbol
I
CCA1
I
CCA2
I
CCS1
I
CCS2
I
LI
I
LO
V
OH
V
OL
Conditions
CE = 0.2 V (CE = V
CC
– 0.2 V), V
I
= V
CC
– 0.2 V/0.2 V
CE = V
IL
(CE = V
IH
), I
O
= 0 mA, V
I
= V
IH
/V
IL
, f = 5 MHz
CE = V
CC
– 0.2 V (CE = 0.2 V)
CE = V
IH
(CE = V
IL
)
V
IN
= 0 to V
CC
CE or OE = V
IH
(CE or OE = V
IL
), V
OUT
= 0 to V
CC
I
OH
= –0.5 mA
I
OL
= 0.5 mA
V
CC
– 0.2
0.2
Ratings
min
typ
max
15
20
5 (0.5*)
50 (10*)
±1.0
±1.0
Unit
mA
mA
µA
µA
µA
µA
V
V
Operating supply current
Standby supply current
Input leakage current
Output leakage current
Output high level voltage
Output low level voltage
Note:
*
Guaranteed at Ta = 25°C
AC Characteristics
at Ta = 0 to +70°C, V
CC
= 2.7 to 3.6 V
Parameter
Cycle time
Address access time
CE access time
OE access time
Output hold time
Output disable
time
*1
Symbol
t
CYC
t
AA
t
CA
t
OA
t
OH
t
OD
25
50
Conditions
Ratings
min
200 (150
*2
)
200 (150
*2
)
200 (150
*2
)
80 (60
*2
)
typ
max
Unit
ns
ns
ns
ns
ns
ns
Note: 1. t
OD
is measured from the earlier edge of the CE (CE) or OE(OE)’s going high impedance.
This parameter is periodically sampled and not 100% tested.
2. Guaranteed at V
CC
= 3.0 to 3.6 V
No. 5087-3/5
LC371100SP, SM, ST-10/20LV
5 V Operation
DC Recommended Operating Ranges
at Ta = 0 to +70°C
Parameter
Supply voltage
Input high level voltage
Input low level voltage
Symbol
V
CC
max
V
IH
V
IL
Conditions
Ratings
min
4.5
2.2
–0.3
typ
5.0
max
5.5
V
CC
+ 0.3
+0.6
Unit
V
V
V
DC Characteristics
at Ta = 0 to +70°C, V
CC
= 5.0 V ±10%
Parameter
Symbol
I
CCA1
I
CCA2
I
CCS1
I
CCS2
I
LI
I
LO
V
OH
V
OL
Conditions
CE = 0.2 V (CE = V
CC
– 0.2 V), V
I
= V
CC
– 0.2 V/0.2 V
CE = V
IL
(CE = V
IH
), I
O
= 0 mA, V
I
= V
IH
/V
IL
, f = 10 MHz
CE = V
CC
– 0.2 V (CE = 0.2 V)
CE = V
IH
(CE = V
IL
)
V
IN
= 0 to V
CC
CE or OE = V
IH
(CE or OE = V
IL
), V
OUT
= 0 to V
CC
I
OH
= –1.0 mA
I
OL
= 2.0 mA
2.4
0.4
Ratings
min
typ
max
30
70
30 (1.0*)
1.0 (300*)
±1.0
±1.0
Unit
mA
mA
µA
mA (µA)
µA
µA
V
V
Operating supply current
Standby supply current
Input leakage current
Output leakage current
Output high level voltage
Output low level voltage
Note:
*
Guaranteed at Ta = 25°C
AC Characteristics
at Ta = 0 to +70°C, V
CC
= 5.0 V ±10%
Parameter
Cycle time
Address access time
CE access time
OE access time
Output hold time
Output disable time*
Symbol
t
CYC
t
AA
t
CA
t
OA
t
OH
t
OD
20
30
Conditions
Ratings
min
100
100
100
40
typ
max
Unit
ns
ns
ns
ns
ns
ns
Note:
*
t
OD
is measured from the earlier edge of the CE (CE) or OE(OE)’s going high impedance.
This parameter is periodically sampled and not 100% tested.
AC Test Conditions
Input pulse levels
Input rise/fall time
Input timing level
Output timing level
Output load
0.4 V to 0.8 V
CC
(3 V measurement),
0.6 V to 2.4 V (5 V measurement)
5 ns
1.5 V
1.5 V
70 pF (3 V measurement)
See figure (5 V measurement)
Output Load (5 V measurement)
No. 5087-4/5
LC371100SP, SM, ST-10/20LV
Timing Chart
System Design Notes
These LSIs adopt an internal synchronization technique in which operation is started by detecting changes in either the
CE input or the address inputs. As a result, the output data immediately after power on is invalid. Once power has been
applied, valid data is output after the application changes the value of either the CE input or at least one of the address
inputs.
Another point due to the use of the ATD technique is that these LSIs are extremely sensitive to input noise. Applications
must take precautions to provide stable input signals, both for the CE input and the address inputs, to prevent incorrect
operation.
s
No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace
equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of
which may directly or indirectly cause injury, death or property loss.
s
Anyone purchasing any products described or contained herein for an above-mentioned use shall:
Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and
distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all
damages, cost and expenses associated with such use:
Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on
SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees
jointly or severally.
s
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for
volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied
regarding its use or any infringements of intellectual property rights or other rights of third parties.
This catalog provides information as of April, 1998. Specifications and information herein are subject to change
without notice.
PS No. 5087-5/5
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